Abstract
The MV/8000 Microsequencing subsection is presented as a case study of a microprogrammed CPU engine. A brief, but comprehensive, description of the micro-orders are discussed with both hardware and firmware aspects considered. Features that are highlighted include: Micro-interruptability (a micro-trapping mechanism); True microsubroutining of macroinstructions (IPOP); Micro-dispatching capability; and test and toggle micro-controllable flags.
- 1 "ECLIPSE MV/8000 Product Summary", Data General Corporation, 014-000650Google Scholar
- 2 "ECLIPSE MV/8000 Principles of Operation", Data General Corporation, 014-000648Google Scholar
- 3 "ECLIPSE MV/8000 System Control Processor", Data General Corporation, 014-000649Google Scholar
- 4 "ECLIPSE MV/8000 Microinstruction Format: UINSTLS", Data General Corporation, 080-005005Google Scholar
Index Terms
The ECLIPSE® MV/8000 Microsequencer
Recommendations
The ECLIPSE® MV/8000 Microsequencer
MICRO 13: Proceedings of the 13th annual workshop on MicroprogrammingThe MV/8000 Microsequencing subsection is presented as a case study of a microprogrammed CPU engine. A brief, but comprehensive, description of the micro-orders are discussed with both hardware and firmware aspects considered. Features that are ...
The micro-architecture of the ECLIPSE® MV/8000: Conception and implementation
MICRO 13: Proceedings of the 13th annual workshop on MicroprogrammingThe microcode of the ECLIPSE MV/8000 controls the hardware to emulate an instruction set. In the MV/8000 the micro-architecture is defined and limited by the following constraints: 1) the desire to implement microcode in a limited number of locations; ...
The micro-architecture of the ECLIPSE® MV/8000: Conception and implementation
The microcode of the ECLIPSE MV/8000 controls the hardware to emulate an instruction set. In the MV/8000 the micro-architecture is defined and limited by the following constraints: 1) the desire to implement microcode in a limited number of locations; ...






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