Abstract
A user-microprogrammable computer has been developed for use as a building block in general-purpose and dedicated computer systems. The architecture is designed to be easily microprogrammed and features a 32-bit, vertically oriented microinstruction. The processor has a 135-nanosecond cycle time, either 16- or 20-bit macro data paths, and 1024 hardware registers. A significant fraction of the processor bandwidth may be budgeted for I/O processing to allow the substitution of microcode for expensive peripheral controllers. Furthermore, the micromachine is well suited to the emulation of other computer architectures in that it provides a large writable microcode memory and a minimum of special processor data paths. The design goals and strategies which determined the machine architecture are discussed, as well as an overview of the architecture and hardware organization. Finally, we report a number of specific applications developed to date.
- 1 T.G. Rauscher and P.M. Adams, "Microprogramming: A Tutorial and Survey of Recent Developments," IEEE Trans. on Computers, Vol. C-29, No. 1, pp. 2-20 (Jan. 1980).Google Scholar
- 2 M.V. Wilkes, "The Best Way to Design an Automatic Calculating Machine," Report of the Manchester University Computer Inaugural Conference, Manchester University, England, July 1951, pp. 16-18.Google Scholar
- 3 A.B. Salisbury, Microprogrammable Computer Architectures, New York: Elsevier Publishing, 1976. Google Scholar
Digital Library
- 4 C.P. Thacker, et al., "Alto: A Personal Computer," Computer Structures: Readings and Examples, Siewiorek, Bell and Newell (eds.), McGraw-Hill, 1980.Google Scholar
- 5 Nanodata Corp., QM-1 Hardware Level User's Manual, 2nd Ed., Rev. 4, March 1976, Williamsville, NY.Google Scholar
- 6 W.T. Wilner, "Design of the B1700," AFIPS Conference Proceedings, Vol. 41. (1972 FJCC) pp. 489-497.Google Scholar
- 7 C.G. Bell and J.C. Mudge, "The Evolution of the PDP-11" Chapter 16 of Computer Engineering, C.G. Bell, J.C. Mudge, J.E. McNamara (eds.), Digital Press, 1978.Google Scholar
- 8 W.A. Wulf and S.P. Harbison, "Reflections in a Pool of Processors," Carnegie-Mellon University Report CS-78-103, Feb. 1978.Google Scholar
- 9 R. Weissler, M. Kraley and P. Herman, "MBB Microprogrammer's Handbook," BBN Report No. 4268, Feb. 1980.Google Scholar
- 10 D. Katsuki, E. Elsam, W. Mann, E. Roberts, J. Robinson, S. Skowronski, and E. Wolf, "Pluribus—An Operational Fault-Tolerant Multiprocessor," Proc. of the IEEE, Vol. 66, October 1978.Google Scholar
- 11 S.M. Ornstein, W.R. Crowther, M.F. Kraley, R.D. Bressler, A. Michel and F.E. Heart, "Pluribus—A Reliable Multiprocessor," AFIPS Conference Proceedings, Vol. 44, May 1975, pp. 551-559.Google Scholar
- 12 F.E. Heart, R.E. Kahn, S.M. Ornstein, W.R. Crowther and D.C. Walden, "The Interface Message Processor for the ARPA Computer Network," AFIPS Conference Proceedings, Vol. 36, June 1970, pp. 552-567.Google Scholar
- 13 S.M. Ornstein, F.E. Heart, W.R. Crowther, H.K. Rising. S.B. Russell and A. Michel, "The Terminal IMP for the ARPA Computer Network," AFIPS Conference Proceedings, Vol. 40, June 1972.Google Scholar
- 14 S.C. Butterfield, R.D. Rettberg and D.C. Walden, "The Satellite IMP for the ARPA Network," Proceedings of the Seventh Annual Hawaii International Conference on System Sciences, Honolulu, Hawaii, January 1974, Computer Nets Supplement, pp. 70-73.Google Scholar
- 15 I. Jacobs, E. Hoversten, N. Abel, R. Binder, R. Bressler, W. Edmond and E. Killian, "Packet Satellite Network Design Issues," National Telecommunications Conference Record, November 1979.Google Scholar
- 16 B.W. Kernighan and D.P. Ritchie, The C Programming Language, Prentice Hall, 1978. Google Scholar
Digital Library
- 17 D.M. Ritchie and K. Thompson, "The UNIX Time-Sharing System," CACM, 17, No. 7 (July 1974), pp. 365-375. (Also reprinted in Bell System Technical Journal, Vol. 51, No. 6, pp. 1897-2305, July-August 1978, special issue on UNIX). Google Scholar
Digital Library
- 18 W.F. Mann, S.M. Ornstein, and M.F. Kraley, "A Network-Oriented Multiprocessor Front-End Handling Many Hosts and Hundreds of Terminals," AFIPS Conference Proceedings, Vol. 45, June 1976, pp. 533-540.Google Scholar
Index Terms
Design of a user-microprogrammable building block
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