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Optimizing delayed branches

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Published:05 October 1982Publication History
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Abstract

Delayed branches are commonly found in micro-architectures. A compiler or assembler can exploit delayed branches. This is achieved by moving code from one of several points to the positions following the branch instruction. We present several strategies for moving code to utilize the branch delay, and discuss the requirements and benefits of these strategies. An algorithm for processing branch delays has been implemented and we give empirical results. The performance data show that a reasonable percentage of these delays can be avoided.

References

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            cover image ACM SIGMICRO Newsletter
            ACM SIGMICRO Newsletter  Volume 13, Issue 4
            Dec. 1982
            169 pages
            ISSN:1050-916X
            DOI:10.1145/1014194
            Issue’s Table of Contents

            Copyright © 1982 Authors

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            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Published: 5 October 1982

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