skip to main content
article
Free Access

An approach to microprogram optimization considering resource occupancy and instruction formats

Published:01 September 1977Publication History
Skip Abstract Section

Abstract

This paper describes a microprogram optimization technique considering resource occupancy and microinstruction format. This technique is applicable to machines whose microoperation occupies several machine cycles on a submachine cycle basis, and whose microinstruction format varies from horizontal to partially encoded, to vertical. “Microtemplate” is proposed to represent fetch timing and period of resource usage for a microoperation on a machine cycle and submachine cycle basis. An algorithm is shown, which detects concurrency of sequentially written microoperations through manipulation of microtemplates. An algorithm of microinstruction format selection is also discussed which decides one instruction format when several candidates exist. Effectiveness of this technique is evaluated. Efficient object codes are generated when applied to a practical sophisticated microprogrammable computer.

References

  1. 1 T. Agerwala, "Microprogram optimization: A survey," IEEE Trans. Comput., vol.C-25, pp.962-973, Oct. 1976.Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. 2 C.V. Ramamoorthy and M. Tsuchiya, "A high level language for horizontal microprogramming," IEEE Trans. Comput., vol.C-23, pp.791-801, Aug. 1974.Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. 3 M. Tsuchiya and M.J. Gonzalez, "Toward optimization of horizontal microprograms," IEEE Trans. Comput., vol.C-25, pp.992-999. Oct. 1976.Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4 S. Dasgupta and J. Tartar, "The identification of maximal parallelism in straight-line microprograms," IEEE Trans. Comput., vol.C-25, pp.986-991, Oct. 1976.Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5 D.J. DeWitt, "A control word model for detecting conflicts between microprograms," in 8th Annu. Workshop on Microprogramming, Preprints, pp.6-12, Oct. 1975. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6 M. Tokoro, T. Watanabe, K. Kawakami, J. Sugano, and K. Noda, "PM/II—multiprocessor oriented byte-sliced LSI processor modules," AFIPS Proc. National Computer Conference, pp217-225, June 1977.Google ScholarGoogle Scholar

Index Terms

  1. An approach to microprogram optimization considering resource occupancy and instruction formats

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in

      Full Access

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader
      About Cookies On This Site

      We use cookies to ensure that we give you the best experience on our website.

      Learn more

      Got it!