Abstract
MUNAP (MUlti-NAnoProgram machine) is a two-level microprogrammed multiprocessor computer designed and developed at a university as a research vehicle. This paper describes the experiences with the implementation of MUNAP. We start with a brief overview of the machine. We then describe the system organization both on hardware and support software. The architectural hierarchies defined on the basic hardware and software systems are described in detail. We conclude the paper with a list of the lessons we have learned from the experience.
- Baba, T, Ishikawa, K., Okuda, K., and Kobayashi, H.: "MUNAP - A Two-Level Microprogrammed Multiprocessor Architecture for Nonnumeric Processing," Proc. IFIP Congress 80, (Oct. 1980), pp. 169--174.Google Scholar
- Baba, T., and Hagiwara, H.: "The MPG System: A Machine-Independent Efficient Microprogram Generator," IEEE Trans. Comput., (June 1981), pp.373--395.Google Scholar
Digital Library
- Baba, T., Hashimoto, N., Yamazaki, K, and Okuda, K.: "Microprogramming Support System for a Two-Level Microprogrammed Computer MUNAP," Trans. IECE Japan, (Oct. 1982), pp. 1265--1272.Google Scholar
- Baba, T., Ishikawa, K., and Okuda, K.: "A Two-Level Microprogrammed Multiprocessor Computer with Nonnumeric Functions," IEEE Trans. Comput., (Dec. 1982), pp. 1142--1156.Google Scholar
Digital Library
- Baba, T., Hashimoto, N., Kanai, H., Okuda, K., and Hashimoto, K.: "Hierarchical Micro-Architectures of a Two-Level Microprogrammed Multiprocessor Computer," to be published in the proceedings of International Conference on Parallel Processing, Aug. 1983.Google Scholar
- Barr, R. G., Becker, J. A., Liinsky, W. P., and Tantillo, V. V.: "A Research-Oriented Dynamic Microprocessor," IEEE Trans. Comput., (Nov. 1973), pp. 976--985.Google Scholar
Digital Library
- Fisher, J. A.: Very Long Instruction Word Architectures and the ELI-512, Proc. of the 10th Annual Int. Symposium on Computer Architecture, (June 1983), pp. 140--150. Google Scholar
Digital Library
- Hashimoto, N.: "Micro-Architecture Description Languages for a Two-Level Microprogrammed Computer MUNAP," Master thesis of Dept. Inf. Sci., Utsunomiya University, Japan, (March 1983).Google Scholar
- Kernigham, B. W. and Ritchie, D. M.: The C Programming Language, Prentice Hall, Inc., (1978). Google Scholar
Digital Library
- Moto-oka, T.: "Future Aspects of Computer System," IECE Japan, (1979), pp. 1204--1207.Google Scholar
- Myers, G. J.: Advances in Computer Architecture, New York: Wiley, (1978). Google Scholar
Digital Library
- Rosin, R. F., Frieder, G., and Eckhouse, R. H.: "An Environment for Research in Microprogramming and Emulation," Commun. Ass. Comput. Mach., (Aug. 1972), pp. 748--760. Google Scholar
Digital Library
- Tomita, S., Shibayama, K., Kitamura, T., Tanaka, T., and Hagiwara, H.: "A User-Microprogrammable Local Host Computer with Low-Level Parallelism," Proc. of the 10the Annual Int. Symposium on Computer Architecture, (June 1983), pp.151--159. Google Scholar
Digital Library
- Yamazaki, K., Hashimoto, N., Kanai, H., Baba, T., Okuda, K., and Hashimoto, K.: A System Description Language for a Two-Level Microprogrmmed Computer MUNAP: MSDL, Tech. Rep. of IECE Japan, EC82-60, (Dec. 1982).Google Scholar
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