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iAPX 286 microarchitecture to maximize performance

Published:01 July 1984Publication History
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Abstract

Designers of previous generations of microprocessors have relied heavily on ever higher clock frequencies in order to provide increased throughput. As successive generations of microprocessors become more and more optimized, it becomes necessary to increase the use of parallelism and pipelining in order to realize significant increases in throughput. The internal circuitry of the iAPX 286 is organized in such a way that throughput is significantly increased even though major functional enhancements, which would normally be expected to reduce throughput, are also implemented.

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  1. iAPX 286 microarchitecture to maximize performance

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      cover image ACM SIGMICRO Newsletter
      ACM SIGMICRO Newsletter  Volume 15, Issue 2
      Real microprogrammers do it horizontally and vertically
      July 1984
      28 pages
      ISSN:1050-916X
      DOI:10.1145/1096458
      Issue’s Table of Contents

      Copyright © 1984 Authors

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 1 July 1984

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