skip to main content
article

Tradeoffs in transactional memory virtualization

Published:20 October 2006Publication History
Skip Abstract Section

Abstract

For transactional memory (TM) to achieve widespread acceptance, transactions should not be limited to the physical resources of any specific hardware implementation. TM systems should guarantee correct execution even when transactions exceed scheduling quanta, overflow the capacity of hardware caches and physical memory, or include more independent nesting levels than what is supported in hardware. Existing proposals for TM virtualization are either incomplete or rely on complex hardware implementations, which are an overkill if virtualization is invoked infrequently in the common case.We present eXtended Transactional Memory (XTM), the first TM virtualization system that virtualizes all aspects of transactional execution (time, space, and nesting depth). XTM is implemented in software using virtual memory support. It operates at page granularity, using private copies of overflowed pages to buffer memory updates until the transaction commits and snapshots of pages to detect interference between transactions. We also describe two enhancements to XTM that use limited hardware support to address key performance bottlenecks.We compare XTM to hardwarebased virtualization using both real applications and synthetic microbenchmarks. We show that despite being software-based, XTM and its enhancements are competitive with hardware-based alternatives. Overall, we demonstrate that XTM provides a complete, flexible, and low-cost mechanism for practical TM virtualization.

References

  1. A.-R. Adl-Tabatabai, B. Lewis, V. Menon, B.R. Murphy, B. Saha, and T. Shpeisman. Compiler and runtime support for efficient software transactional memory. In PLDI '06: Proceedings of the 2006 ACM SIGPLAN Conference on Programming Language Design and Implementation, New York, NY, USA, 2006. ACM Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. C.S. Ananian, K. Asanovíc, B.C. Kuszmaul, C.E. Leiserson, and S. Lie. Unbounded transactional memory. In Proceedings of the 11th International Symposium on High-Performance Computer Architecture (HPCA'05), pages 316--327, San Franscisco, California, February 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. J. Chung, H. Chafi, C. Cao Minh, A. McDonald, B.D. Carlstrom, C. Kozyrakis, and K. Olukotun. The common case transactional behavior of multithreaded programs. In Proceedings of the 12th International Conference on High-Performance Computer Architecture, February 2006.Google ScholarGoogle Scholar
  4. K. Diefendorff, P.K. Dubey, R. Hochsprung, and H. Scales. Altivec extension to PowerPC accelerates media processing. IEEE Micro, 20(2):85--95, March 2000. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. T. Haerder. Observations on optimistic concurrency control schemes. Inf. Syst., 9(2):111--120, 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. L. Hammond, V. Wong, M. Chen, B.D. Carlstrom, J.D. Davis, B. Hertzberg, M.K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional memory coherence and consistency. In Proceedings of the 31st International Symposium on Computer Architecture, pages 102--113, June 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. T. Harris and K. Fraser. Language support for lightweight transactions. In OOPSLA '03: Proceedings of the 18th annual ACM SIGPLAN conference on Object-oriented programing, systems, languages, and applications, pages 388--402. ACM Press, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. T. Harris, M. Plesko, A. Shinnar, and D. Tarditi. Optimizing memory transactions. In PLDI '06: Proceedings of the 2006 ACM SIGPLAN Conference on Programming Language Design and Implementation, New York, NY, USA, 2006. ACM Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. M. Herlihy, V. Luchangco, M. Moir, and I. William N. Scherer. Software transactional memory for dynamic-sized data structures. In PODC '03: Proceedings of the twenty-second annual symposium on Principles of distributed computing, pages 92--101, New York, NY, USA, July 2003. ACM Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. M. Herlihy and J.E.B. Moss. Transactional memory: Architectural support for lock-free data structures. In Proceedings of the 20th International Symposium on Computer Architecture, pages 289--300, 1993. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. S. Kumar, M. Chu, C.J. Hughes, P. Kundu, and A. Nguyen. Hybrid transactional memory. In PPoPP '06: Proceedings of the eleventh ACM SIGPLAN symposium on Principles and practice of parallel programming, New York, NY, USA, March 2006. ACM Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. D.E. Lowell and P.M. Chen. Free transactions with Rio Vista. In Proceedings of the 16th symposium on Operating systems principles, Saint Malo, France, October 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. V.J. Marathe, W.N. Scherer III, and M.L. Scott. Adaptive software transactional memory. In 19th International Symposium on Distributed Computing, September 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. A. McDonald, J. Chung, B.D. Carlstrom, C. Cao Minh, H. Chafi, C. Kozyrakis, and K. Olukotun. Architectural semantics for practical transactional memory. In Proceedings of the 33rd International Symposium on Computer Architecture, June 2006. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. A. McDonald, J. Chung, H. Chafi, C. Cao Minh, B.D. Carlstrom, L. Hammond, C. Kozyrakis, and K. Olukotun. Characterization of TCC on chip-multiprocessors. In PACT '05: Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques, pages 63--74, St. Louis, MD, USA, September 2005. IEEE Computer Society. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. M. Moir. Hybrid transactional memory. Unpublished manuscript, July 2005.Google ScholarGoogle Scholar
  17. K.E. Moore, J. Bobba, M.J. Moravan, M.D. Hill, and D.A. Wood. Logtm: Log-based transactional memory. In 12th International Conference on High-Performance Computer Architecture, February 2006.Google ScholarGoogle ScholarCross RefCross Ref
  18. R. Rajwar and J.R. Goodman. Transactional lock-free execution of lock-based programs. In ASPLOS-X: Proceedings of the 10th international conference on Architectural support for programming languages and operating systems, pages 5--17, New York, NY, USA, October 2002. ACM Press. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. R. Rajwar, M. Herlihy, and K. Lai. Virtualizing transactional memory. In ISCA '05: Proceedings of the 32nd Annual International Symposium on Computer Architecture, pages 494--505, Madison, WI, USA, June 2005. IEEE Computer Society. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. M. Satyanarayanan, H.H. Mashburn, P. Kumar, D.C. Steere, and J.J. Kistler. Lightweight recoverable virtual memory. ACM Transactions on Computer Systems, 12(1), 1994. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. D.J. Scales, K. Gharachorloo, and C.A. Thekkath. Shasta: a low overhead, software-only approach for supporting fine-grain shared memory. In Proceedings of the 7th International Conference on Architectural Support for Programming Languages and Operating Systems, Cambridge, MA, October 1996. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. N. Shavit and D. Touitou. Software transactional memory. In Proceedings of the 14th Annual ACM Symposium on Principles of Distributed Computing, pages 204--213, Ottawa, Canada, August 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. J.P. Singh, W.-D. Weber, and A. Gupta. SPLASH: Stanford Parallel Applications for Shared-Memory. Computer Architecture News. Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. Standard Performance Evaluation Corporation, SPEC CPU Benchmarks. http://www.specbench.org/, 1995-2000.Google ScholarGoogle Scholar
  25. R. Stets, S. Dwarkadas, N. Hardavellas, G. Hunt, L. Kontothanassis, S. Parthasarathy, and M. Scott. Cashmere-2l: Software coherent shared memory on a clustered remote-write network. In Proceedings of the 16th Symposium on Operating Systems Principles, Saint Malo, France, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. S.T. Thakkar and T. Huff. The internet streaming SIMD extensions. Intel Technology Journal, (Q2):8, 1999.Google ScholarGoogle Scholar
  27. C.A. Waldspurger. Memory resource management in VMware ESX server. SIGOPS Oper. Syst. Rev., 36(SI):181--194, 2002. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. S.C. Woo, M. Ohara, E. Torrie, J.P. Singh, and A. Gupta. The SPLASH2 Programs: Characterization and Methodological Considerations. In Proceedings of the 22nd International Symposium on Computer Architecture, pages 24--36, June 1995. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Tradeoffs in transactional memory virtualization

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in

    Full Access

    • Published in

      cover image ACM SIGPLAN Notices
      ACM SIGPLAN Notices  Volume 41, Issue 11
      Proceedings of the 2006 ASPLOS Conference
      November 2006
      425 pages
      ISSN:0362-1340
      EISSN:1558-1160
      DOI:10.1145/1168918
      Issue’s Table of Contents
      • cover image ACM Conferences
        ASPLOS XII: Proceedings of the 12th international conference on Architectural support for programming languages and operating systems
        October 2006
        440 pages
        ISBN:1595934510
        DOI:10.1145/1168857

      Copyright © 2006 ACM

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 20 October 2006

      Check for updates

      Qualifiers

      • article

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader
    About Cookies On This Site

    We use cookies to ensure that we give you the best experience on our website.

    Learn more

    Got it!