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The XTREM power and performance simulator for the Intel XScale core: Design and experiences

Published:01 February 2007Publication History
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Abstract

Managing power concerns in microprocessors has become a pressing research problem across the domains of computer architecture, CAD, and compilers. As a result, several parameterized cycle-level power simulators have been introduced. While these simulators can be quite useful for microarchitectural studies, their generality limits how accurate they can be for any one chip family. Furthermore, their hardware focus means that they do not explicitly enable studying the interaction of different software layers, such as Java applications and their underlying runtime system software. This paper describes and evaluates XTREM, a power-simulation tool tailored for the Intel XScale microarchitecture. In building XTREM, our goals were to develop a microarchitecture simulator that, while still offering size parameterizations for cache and other structures, more accurately reflected a realistic processor pipeline. We present a detailed set of validations based on multimeter power measurements and hardware performance counter sampling. XTREM exhibits an average performance error of only 6.5% and an even smaller average power error: 4%. The paper goes on to present an application study enabled by the simulator. Namely, we use XTREM to produce an energy consumption breakdown for Java CDC and CLDC applications. Our simulator measurements indicate that a large percentage of the total energy consumption (up to 35%) is devoted to the virtual machine's support functions.

References

  1. Alpern, B., Attanasio, C. R., et al. 2000. The Jalapeno Virual Machine. IBM System Journal 39, 1. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Brooks, D., Tiwari, V., and Martonosi, M. 2000. Wattch: A framework for architectural-level power analysis and optimizations. In Proceedings of the 27th International Symposium on Computer Architecture. Google ScholarGoogle Scholar
  3. Chang, N., Kim, K., and Lee, H. G. 2000. Cycle-accurate energy measurement and characterization with a case study of the ARM7TDMI. In IEEE Transactions on Very Large Scale Integration (VLSI) Systems. Google ScholarGoogle Scholar
  4. Clark, L., Hoffman, E., Miller, J., Biyani, M., Liao, L., Strazdus, S., Morrow, M., Velarde, K., and Yarch, M. 2001. An embedded 32-b microprocessor core for low-power and high-performance applications. Solid-State Circuits, IEEE Journal of 36, 11 (Nov.), 1599--1608.Google ScholarGoogle Scholar
  5. Contreras, G. and Martonosi, M. 2005. Power prediction for Intel XScale processors using performance monitoring unit events. In Proceedings from the International Symposium on Low-Power Electronics and Design. Google ScholarGoogle Scholar
  6. Contreras, G., Martonosi, M., Peng, J., Ju, R., and Lueh, G.-Y. 2004. XTREM: A power simulator for the Intel XScale core. In Proceedings from the 2004 Conference on Languages, Compilers, and Tools for Embedded Systems (LCTES'02). Google ScholarGoogle Scholar
  7. Embedded Microprocessor Benchmark Consortium. 2003. EEMBC benchmarks for the Java 2 micro edition (J2ME) platform. http://www.eembc.org.Google ScholarGoogle Scholar
  8. Farkas, K. I., Flinn, J., Back, G., Grunwald, D., and Anderson, J.-A. M. 2000. Quantifying the energy consumption of a pocket computer and a Java Virtual Machine. In Measurement and Modeling of Computer Systems. 252--263. Google ScholarGoogle Scholar
  9. FM Software. 2004. GIF Picture Decoder. http://www.fmsware.com/stuff/gif.html.Google ScholarGoogle Scholar
  10. Guthaus, M. R. et al. 2001. MiBench: A free, commercially representative embedded benchmark suite. In IEEE 4th Annual Workshop on Workload Characterization,. Google ScholarGoogle Scholar
  11. Intel Corporation 2000. Intel XScale Core: Developer's Manual. Intel Corporation. Order No. 273473-001.Google ScholarGoogle Scholar
  12. Intel Corporation 2003a. Intel DBPXA255 Development Platform for the Intel Personal Internet Client Architecture. Intel Corporation. Order No. 278701-001.Google ScholarGoogle Scholar
  13. Intel Corporation 2003b. Intel XScale Microarchitecture for the PXA255 Processor: User's Manual. Intel Corporation. Order No. 278796.Google ScholarGoogle Scholar
  14. Isci, C. and Martonosi, M. 2003. Runtime power monitoring using high-end processors: Methodology and empirical data. In Proceedings from the 36th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-36). 93--104. Google ScholarGoogle Scholar
  15. Jean-loup Gailly and Mark Adler. 2004. Zlib Java Implementation. http://www.jcraft.com/jzlib.Google ScholarGoogle Scholar
  16. Krishnaswamy, A. and Gupta, R. 2002. Profile Guided Selection of ARM and Thumb Instructions.Google ScholarGoogle Scholar
  17. Legion of the Bouncy Castle. 2004. Bouncy Castle Crypto 1.18. http://www.bouncycastle.org/.Google ScholarGoogle Scholar
  18. Liao, Y. and Roberts, D. 2002. A high-performance and low-power 32-bit multiply-accumulate unit with single-instruction-multiple-data (SIMD) feature. Solid-State Circuits, IEEE Journal of 37, 7 (July), 926--931.Google ScholarGoogle Scholar
  19. M. Levy. 2002. Exploring the ARM1026EJ-S Pipeline: Extensive Architectural Modeling Highlights Frequency and IPC Tradeoffs. http://www.arm.com/miscPDFs/1752.pdf.Google ScholarGoogle Scholar
  20. Standard Performance Evaluation Corporation. 1998. Spec JVM Client98. http://www.specbench.org/jvm98/jvm98/doc/benchmarks/index.html.Google ScholarGoogle Scholar
  21. Sun Microsystems 2000. J2ME Building Block For Mobile Devices: White Paper on KVM and the Connected Limited Device Configuration (CLDC). Sun Microsystems. http://java.sun.com/j2me/docs/index.html.Google ScholarGoogle Scholar
  22. The SimpleScalar-ARM Power Modeling Project. 2004. PowerAnalyzer. http://www.eecs.umich.edu/~panalyzer.Google ScholarGoogle Scholar
  23. The SimpleScalar Toolset. 2001. SimpleScalar LLC. http://www.simplescalar.com.Google ScholarGoogle Scholar
  24. Vijaykrishnan, N. 2000. Energy-driven integrated hardware-software optimizations using SimplePower. In Proceedings of the 27th International Symposium on Computer Architecture. Google ScholarGoogle ScholarCross RefCross Ref
  25. Vijaykrishnan, N., M. Kandemir, S. K., Tomar, S., Sivasubramaniam, A., and Irwin, M. J. 2001. Energy behavior of Java applications from the memory perspective. The 1st USENIX Java Virtual Machine Research and Technology Symposium (JVM'01). Google ScholarGoogle Scholar
  26. Ye, W., Vijaykrishnan, N., Kandemir, M. T., and Irwin, M. J. 2000. The design and use of SimplePower: A cycle-accurate energy estimation tool. In Design Automation Conference. 340--345. Google ScholarGoogle Scholar
  27. Zaliva, V. 2004. Java regular expressions. http://www.crocodile.org.Google ScholarGoogle Scholar

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