skip to main content
article
Free Access

Instruction fetch techniques using program equivalence

Published:01 January 1974Publication History
Skip Abstract Section

Abstract

This paper discusses potential techniques for the dynamic generation of instructions in the instruction fetch unit of a processor. The chief advantage is the increased effective bandwidth in transfer of compressed program information from memory to the processor unit, which allows higher processor speed for a given memory access rate. The method is independent of cache memory techniques, although aimed at the same problem, and could be combined with use of a cache memory to obtain still more speedup of processor execution. The paper is largely at a conceptual level; work is planned to obtain data to facilitate design and simulation of a prototype machine.

References

  1. Liptay, J. S., "Structural Aspects of the System/360 Model 85. Part II, The Cache," IBM Syst. J. 7, 1 (1968), p. 19.Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Flynn, Michael J. and M. Donald MacLaren, "Microprogramming Revisited," Proceedings of the 22nd National Conference, ACM, 1967, p. 457. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. Wilkes, M. V., "The Growth of Interest in Microprogramming: A Literature Survey," Computing Surveys 1, 3 (1969), p. 139. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. Wilkes, M. V., "The Best Way to Design an Automatic Calculating Machine," Manchester University, Computer Inaugural Conference, 1951, p. 16.Google ScholarGoogle Scholar
  5. Rosin, R. F., "Contemporary Concepts of Microprogramming and Emulation," Computing Surveys 1, 4 (1969), p. 197. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. Flynn, M. J. and R. F. Rosin, "Microprogramming: An Introduction and a Viewpoint," IEEE Trans. on Computers C-20, 7 (1971), p. 727.Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. Rakoczi, L. L., "The Computer-Within-a-Computer--A Fourth Generation Concept," IEEE Computer Group News, March 1969, p. 14.Google ScholarGoogle Scholar
  8. Tucker, A. B. and M. J. Flynn, "Dynamic Microprogramming: Processor Organization and Programming," Comm. ACM 14, 4 (1971), p. 240. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. Lewin, M. H., "A Proposed 'Background Move' Instruction," IEEE Computer Group News, November 1969, p. 20.Google ScholarGoogle Scholar
  10. Denning, P. J., "Virtual Memory," Computing Surveys 2, 3 (1970), p. 153. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. Weber, H., "A Microprogrammed Implementation of EULER on IBM System/360 Model 30," Comm. ACM 10, 9 (1967), p. 549. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. Foster, C. F. and R. Gonter, "Conditional Interpretation of Operation Codes," IEEE Trans. on Computers 20, (1971), p. 108.Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Proceedings of an ACM Conference on Proving Assertions about Programs, New Mexico State University, Las Cruces, New Mexico, January 6-7, 1972. Joint issue of SIGACT News and SIGPLAN Notices, January, 1972.Google ScholarGoogle Scholar

Recommendations

Comments

Login options

Check if you have access through your login credentials or your institution to get full access on this article.

Sign in

Full Access

  • Published in

    cover image ACM SIGMICRO Newsletter
    ACM SIGMICRO Newsletter  Volume 4, Issue 4
    January 1974
    57 pages
    ISSN:1050-916X
    DOI:10.1145/1217142
    Issue’s Table of Contents

    Copyright © 1974 Author

    Publisher

    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 1 January 1974

    Check for updates

    Qualifiers

    • article

PDF Format

View or Download as a PDF file.

PDF

eReader

View online with eReader.

eReader
About Cookies On This Site

We use cookies to ensure that we give you the best experience on our website.

Learn more

Got it!