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On the complexity of spill everywhere under SSA form

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Published:13 June 2007Publication History
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Abstract

Compilation for embedded processors can be either aggressive (time consuming cross-compilation) or just in time (embedded and usually dynamic). The heuristics used in dynamic compilation are highly constrained by limited resources, time and memory in particular. Recent results on the SSA form open promising directions for the design of new register allocation heuristics for embedded systems and especially for embedded compilation. In particular, heuristics based on tree scan with two separated phases -- one for spilling, then one for coloring/coalescing -- seem good candidates for designing memory-friendly, fast, and competitive register allocators. Still, also because of the side effect on power consumption, the minimization of loads and stores overhead (spilling problem) is an important issue. This paper provides an exhaustive study of the complexity of the "spill everywhere" problem in the context of the SSA form. Unfortunately, conversely to our initial hopes, many of the questions we raised lead to NP-completeness results. We identify some polynomial cases but that are impractical in JIT context. Nevertheless, they can give hints to simplify formulations for the design of aggressive allocators.

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      • Published in

        cover image ACM SIGPLAN Notices
        ACM SIGPLAN Notices  Volume 42, Issue 7
        Proceedings of the 2007 LCTES conference
        July 2007
        241 pages
        ISSN:0362-1340
        EISSN:1558-1160
        DOI:10.1145/1273444
        Issue’s Table of Contents
        • cover image ACM Conferences
          LCTES '07: Proceedings of the 2007 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
          June 2007
          258 pages
          ISBN:9781595936325
          DOI:10.1145/1254766

        Copyright © 2007 ACM

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        Association for Computing Machinery

        New York, NY, United States

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        • Published: 13 June 2007

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