10.1145/127601.127747acmconferencesArticle/Chapter ViewAbstractPublication PagesdacConference Proceedingsconference-collections
Article
Free Access

CLOVER: a timing constraints verification system

Authors Info & Claims
Online:01 June 1991Publication History
First page image

References

  1. 1.T. Amon and G. Borriello. On the Specification of Timing Behavior. In TAU 1990 A CM Int. Workshop on Tzming Issues, Vancouver, Canada, August 1990.Google ScholarGoogle Scholar
  2. 2.G. Borriello and R. Katz. Design Frames: A New System Integration Methodology. In Chapel Hill [email protected] ence on VLS{, May 1985.Google ScholarGoogle Scholar
  3. 3.M. Browne, E. Clarke, and D. Dill. Automatic Circuit Verification Using Temporal Logic: Two New Examples. In Formal Aspects of VLSI Design. Elsevier Science, 1986.Google ScholarGoogle Scholar
  4. 4.R. E. Bryant. Can a Simulator Verify a Circuit. In G. J. Milne and P. A. Subramanyan, editors, Formal Aspects of VLSI Design. Elsevier Science, 1986.Google ScholarGoogle Scholar
  5. 5.D. Doukas. A New Specification Model for Timing Constraznts and Ejficzent Methods for their Verification. PhD thesis, Princeton University, January 1991. CS- TR-297-90. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6.G. Gibson, D. Wood, and S. Eggers. SPUR Project Technical Documentation. UC Berkeley, 1986.Google ScholarGoogle Scholar
  7. 7.M. Gordon. HOL: A Proof Generating System for Higher-Order Logic. In VLSISpecification, Verzficat~on and Synthesis. Kluwer Academic, 1988.Google ScholarGoogle Scholar
  8. 8.R. B. Hitchcock. Timing Verification and the Timing Analysis Program. In 19th DA C, 1982. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9.Intel Corporation. Intel Multibus Specification, 1982.Google ScholarGoogle Scholar
  10. 10.A. Kara, R. Rastogi, and K. Kawamura. An Expert System to Automate Timing Design. IEEE Design Test of Computers, October 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. 11.A. Martello, S. Levitan, and D. Chiarulli. Timing Verification Using HDTV. In 27th DAC, 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. 12.M. C. McFarland. CPA: Giving an Account of Timed System Behavior. In TA U 1990 A CM Int. Workshop on Timing Issues, Vancouver, Canada, August 1990.Google ScholarGoogle Scholar
  13. 13.T. McWilliams. Verification of Timing Constraints on Large Digital Systems. PhD thesis, Lawrence Livermore Laboratory, May 1980. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. 14.D. Misunas. Petri Nets and Speed Independent Design. Communication of the ACM, 16, 1973. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. 15.B. Moszkowski. A Temporal Logic for Multilevel Reasoning About Hardware. IEEE Computer, February 1985.Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. 16.L. W. Nagel. SPICE2: A Computer Program to Simulate Semiconductor Circuits. PhD thesis, UC Berkeley, May 1975.Google ScholarGoogle Scholar
  17. 17.M. Ram et al. Trace Theory and the Definition of Hierarchical Components. In Proceedings of the 3rd Caltech Conf. on VLSL Computer Science Press, 1983.Google ScholarGoogle ScholarCross RefCross Ref
  18. 18.D. Wallace and C. Sequin. Plug-In Timing Models for an Abstract Timing Verifier. In 23rd DAC, 1986. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. CLOVER: a timing constraints verification system

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in
          • Published in

            ACM Conferences cover image
            DAC '91: Proceedings of the 28th ACM/IEEE Design Automation Conference
            June 1991
            783 pages
            ISBN:0897913957
            DOI:10.1145/127601

            Copyright © 1991 ACM

            Publisher

            Association for Computing Machinery

            New York, NY, United States

            Publication History

            • Online: 1 June 1991
            • Published: 1 June 1991

            Permissions

            Request permissions about this article.

            Request Permissions

            Qualifiers

            • Article

            Acceptance Rates

            Overall Acceptance Rate 2,377 of 7,474 submissions, 32%

            Upcoming Conference

            DAC '22
            DAC '22: 59th ACM/IEEE Design Automation Conference (DAC)
            July 10 - 14, 2022
            San Francisco , CA , USA

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader
          About Cookies On This Site

          We use cookies to ensure that we give you the best experience on our website.

          Learn more

          Got it!