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Formal verification of translation validators: a case study on instruction scheduling optimizations

Published:07 January 2008Publication History
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Abstract

Translation validation consists of transforming a program and a posteriori validating it in order to detect a modification of itssemantics. This approach can be used in a verified compiler, provided that validation is formally proved to be correct. We present two such validators and their Coq proofs of correctness. The validators are designed for two instruction scheduling optimizations: list scheduling and trace scheduling.

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            • Published in

              cover image ACM SIGPLAN Notices
              ACM SIGPLAN Notices  Volume 43, Issue 1
              POPL '08
              January 2008
              420 pages
              ISSN:0362-1340
              EISSN:1558-1160
              DOI:10.1145/1328897
              Issue’s Table of Contents
              • cover image ACM Conferences
                POPL '08: Proceedings of the 35th annual ACM SIGPLAN-SIGACT symposium on Principles of programming languages
                January 2008
                448 pages
                ISBN:9781595936899
                DOI:10.1145/1328438

              Copyright © 2008 ACM

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              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 7 January 2008

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