Abstract
As memory transactions have been proposed as a language-level replacement for locks, there is growing need for well-defined semantics. In contrast to database transactions, transaction memory (TM) semantics are complicated by the fact that programs may access the same memory locations both inside and outside transactions. Strongly atomic semantics, where non-transactional accesses are treated as implicit single-operation transactions, remain difficult to provide without specialized hardware support and/or significant performance overhead. As an alternative, many in the community have informally proposed that a single global lock semantics [16, 9], where transaction semantics are mapped to those of regions protected by a single global lock, provide an intuitive and efficiently implementable model for programmers.
In this paper, we explore the implementation and performance implications of single global lock semantics in a weakly atomic STM from the perspective of Java, and we discuss why even recent STM implementations fall short of these semantics. We describe a new weakly atomic Java STM implementation that provides single global lock semantics while permitting concurrent execution, but we show that this comes at a significant performance cost. We also propose and implement various alternative semantics that loosen single lock requirements while still providing strong guarantees. We compare our new implementations to previous ones, including a strongly atomic STM. [22]
- M. Abadi, A. Birrell, T. Harris, and M. Isard. Semantics of transactional memory and automatic mutual exclusion. In POPL 2008. Google Scholar
Digital Library
- A.-R. Adl-Tabatabai, B. T. Lewis, V. S. Menon, B. R. Murphy, B. Saha, and T. Shpeisman. Compiler and runtime support for efficient software transactional memory. In PLDI 2006. Google Scholar
Digital Library
- S. Adve and K. Gharachorloo. Shared memory consistency models: A tutorial. IEEE Computer, 29(12):66--76, 1996. Google Scholar
Digital Library
- C. S. Ananian, K. Asanovic, B. C. Kuszmaul, C. E. Leiserson, and S. Lie. Unbounded transactional memory. In HPCA 2005. Google Scholar
Digital Library
- C. Blundell, E. C. Lewis, and M. M. K. Martin. Deconstructing transactions: The subtleties of atomicity. In Fourth Annual Workshop on Duplicating, Deconstructing, and Debunking, 2005.Google Scholar
- H. Boehm. A memory model for c++: Strawman proposal. In C++ standards committee paper WG21/N1942, February 2006. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2006/n1942.html.Google Scholar
- D. Dice, O. Shalev, and N. Shavit. Transactional Locking II. In DISC 2006. Google Scholar
Digital Library
- J. Gray and A. Reuter. Transaction Processing: Concepts and Techniques. Morgan Kaufmann, 1993. Google Scholar
Digital Library
- D. Grossman, J. Manson, and W. Pugh. What do high-level memory models mean for transactions? In MSPC 2006. Google Scholar
Digital Library
- L. Hammond, V. Wong, M. Chen, B. D. Carlstrom, J. D. Davis, B. Hertzberg, M. K. Prabhu, H. Wijaya, C. Kozyrakis, and K. Olukotun. Transactional memory coherence and consistency. In ISCA 2004. Google Scholar
Digital Library
- T. Harris and K. Fraser. Language support for lightweight transactions. In OOPSLA 2003. Google Scholar
Digital Library
- T. Harris, S. Marlow, S. P. Jones, and M. Herlihy. Composable memory transactions. In PPoPP 2005. Google Scholar
Digital Library
- T. Harris, M. Plesko, A. Shinnar, and D. Tarditi. Optimizing memory transactions. In PLDI 2006. Google Scholar
Digital Library
- Intel Corporation. Intel 64 Architecture Memory Ordering White Paper. http://www.intel.com/products/processor/manuals/318147.pdf.Google Scholar
- L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Transactions on Computers, 9(29):690--691, 1979. Google Scholar
Digital Library
- J. Larus and R. Rajwar. Transactional Memory. Morgan & Claypool Publishers, 2006.Google Scholar
- J. Manson, W. Pugh, and S. V. Adve. The Java memory model. In POPL 2005. Google Scholar
Digital Library
- V. Menon, S. Balensiefer, T. Shpeisman, A.-R. Adl-Tabatabai, R. L. Hudson, B. Saha, and A. Welc. Towards a lock-based semantics for Java STM. Technical Report UW-CSE-07-11-01, November 2007.Google Scholar
- K. E. Moore, J. Bobba, M. J. Moravan, M. D. Hill, and D. A. Wood. LogTM: Log-based transactional memory. In HPCA 2006.Google Scholar
Cross Ref
- K. F. Moore and D. Grossman. High-level small-step operational semantics for transactions. In POPL 2008. Google Scholar
Digital Library
- R. Rajwar, M. Herlihy, and K. Lai. Virtualizing transactional memory. In ISCA 2005. Google Scholar
Digital Library
- T. Shpeisman, V. Menon, A.-R. Adl-Tabatabai, S. Balensiefer, D. Grossman, R. L. Hudson, K. F. Moore, and S. Bratin. Enforcing isolation and ordering in stm. In PLDI 2007. Google Scholar
Digital Library
- M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Brief announcement: Privatization techniques for software transactional memory. In PODC 2007. Google Scholar
Digital Library
- M. F. Spear, V. J. Marathe, L. Dalessandro, and M. L. Scott. Privatization techniques for software transactional memory. Technical Report 915, University of Rochester, Computer Science Dept., 2007.Google Scholar
Digital Library
- H. Sutter. Prism - A Principle-Based Sequential Memory Model for Microsoft Native Code Platforms Draft Version 0.9.1. http://www.open-std.org/jtc1/sc22/wg21/docs/papers/2006/n2075.pdf, September 2006.Google Scholar
- C. Wang, W.-Y. Chen, Y. Wu, B. Saha, and A.-R. Adl-Tabatabai. Code generation and optimization for transactional memory constructs in an unmanaged language. In CGO 2007. Google Scholar
Digital Library
Index Terms
Single global lock semantics in a weakly atomic STM
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