
- AN88 A. Aiken and A. Nicolau. Optimal Loop Parallelization. In Proceedings of the $IGPLAN '88 Conference on Program. ruing Language Design and Implementa. tion, pages 308-317, Atlanta, GA, June 1988. Google Scholar
Digital Library
- CFS90 R. Cytron, J. Ferrante, and V. $arkar. Compact Representation for Control Dependence. In A CM $IGPLAN '90 Conference on Programming Language Design and Implementation, pages 337-351, June 1990. Google Scholar
- EN90 K. Ebcio~lu and T. Nakatani. A New Compilation Technique for Parallelizing Loops with Unpredictable Branches on a VLIW Architecture. In D. Gelernter, editor, Languages and Compilers for Parallel Computing, pages 213-229. MIT Press, Cambridge,MA, 1990. Google Scholar
Digital Library
- FOW87 J. Ferrante, K. J. Ottenstein, and J. D. Warren. The Program Dependence Graph and Its Use in Optimization. A CM Transactions on Programming Languages and Systems, 9(3):319-349, July 1987. Google Scholar
Digital Library
- GS90 R. Gupta and M. L. Sofia. Region Scheduling: An Approach for Detecting and Redistributing Parallelism. IEEE Transactions on Software Engineering, 16(4):421- 431, April 1990. Google Scholar
Digital Library
- GWN91 G.R. Gao, W-B. Wong, and Q. Nin$. A Timed Petri-Net Model for Fine-Grain Loop Scheduling. In Proceedings of the ACM $IGPLAN '91 Conference on Pro. gramming Language Design and Implementation, pages 204-218, June 26-28 1991. Google Scholar
Digital Library
- Jai91 S. Jain. Circular Scheduling: A New Technique to Perform Software Pipelining. In A CM $ICPLAN Conference on Programming Language Design and Implementa. tion, pages 219-228, June 1991. Google Scholar
- Jan92 J. Janardhan. Transformations fo~' Fine- Grain Parallelism. Master's thesis, Department of Computer Science, Utah State University, Logan, UT, 1992.Google Scholar
- LA92 R.M. Lee and V.H. Allan. Advanced Software Pipelining and the Program Dependence Graph. In Fourth IEEE Symposium on Parallel and Distributed Processing, Dallas, Texas, December 1992.Google Scholar
- Lam88 M.S. Lain. Software Pipelining: An Effective Scheduling Technique for VLIW Machines. In Proceedings of the $IGPLAN '88 Conference on Programming Language De. sign and Implementation, pages 318-328, Atlanta, GA, June 1988. Google Scholar
Digital Library
- Lee92 R. M. Lee. Advanced Software Pipelining on a Program Dependence Graph. Master's thesis, Department of Computer Science, Utah State University, Logan, UT, 1992.Google Scholar
- SW91 B. $u and J. Wang. Loop-carried Dependence and the Improved URPR Software Pipelining Approach. In Proceedings of the ~4th International System Science Conference, HA, 1991.Google Scholar
- Veg82 $.R. Vegdahl. Local Code Generation and Compaction in Optimizing Microcode Compilers. PhD thesis, Department of Computer Science, Carnegie-Mellon University, Pittsburgh, PA, 1982. Google Scholar
Digital Library
- Zak89 A. M. Zaky. Ei~cient Static Scheduling of Loops on Synchronous Multiprocessors. PhD thesis, Department of Computer and Information Science, Ohio State University, Columbus, OH, 1989. Google Scholar
Digital Library
Index Terms
Enhanced region scheduling on a program dependence graph
Recommendations
Advanced software pipelining and the program dependence graph
SPDP '92: Proceedings of the 1992 Fourth IEEE Symposium on Parallel and Distributed ProcessingArchitectures such as horizontal microengines, multiple reduced instruction set computer (RISC) architectures, very long instruction word (VLIW), and long instruction word (LIW) machines benefit from the utilization of low-level parallelism. The authors ...
Minimizing Register Requirements of a Modulo Schedule via Optimum Stage Scheduling
Modulo scheduling is an efficient technique for exploiting instruction level parallelism in a variety of loops, resulting in high performance code but increased register requirements. We present an approach that schedules the loop operations for minimum ...
Evaluation of scheduling techniques on a SPARC-based VLIW testbed
MICRO 30: Proceedings of the 30th annual ACM/IEEE international symposium on MicroarchitectureThe performance of Very Long Instruction Word (VLIW) microprocessors depends on the close cooperation between the compiler and the architecture. This paper evaluates a set of important compilation techniques and related architectural features for VLIW ...






Comments