
- BaCh91 J-L Baer and T-F Chert, "An Effective On- Chip Preloading Scheme to Reduce Data Access Penalty," Proc. Supercomputing 1991, 1991. Google Scholar
Digital Library
- BoKW90 A. Borg, R. E. Kessler, D. W. Wall, "Generation and Analysis of Very Long Address Traces", Proc. 17th. lnt'l. Syrup. on Comp. Arch., pp. 270-279, May 1990. Google Scholar
Digital Library
- Berr89 M. Berry, et. al., "The Perfect Club Benchmarks: Effective Performance Evaluation of Supercomputers," lnt' I. Journal for Supercomputer Applications, Fall 1989.Google Scholar
- Fu92 J.W.C. Fu, "Performance Evaluation of Memory Systems for High Spe~d Computers," Tech. Rpt. CRHC-92-10, Center for Reliable and High Performance Computing, University of Illinois, July 1992.Google Scholar
- FuPa91 J.W.C. Fu and J. H. Patel, "Prefetching in Mulfiprocessor Vector Cache Memories", Proc. of 18th. lnt'l Syrup. on Cornp. Arch., pp. 54-63. Google Scholar
Digital Library
- Jans91 B.L. Janssens, "Generation of Mulfiprocessor Address Traces and their use in the Performance Analysis of Cache-based Error Recovery Methods," Tech. Rpt. CRHC-91-10, Center for Reliable and High Performance Computing, University of Illinois, May 1991.Google Scholar
- Przy90 S. Przybyl~, "The Performance Impact of Block Size and Fetch Strategies," Proc. 17th. Ann. lnt' I. Syrup. on Comp. Arch., pp 160-169, June 1990. Google Scholar
Digital Library
- Skle92 I. Sldenar, "Prefetch Unit for Vector Operations on Scalar Computers," Proc. 19th. Ann. lnt' I. Syrnp. on Comp. Arch. (poster), pp 430, June 1992. Google Scholar
Digital Library
- Smit82 A.J. Smith, "Cache Memories," ACM Comp. Surveys, vol 18, no. 3, pp 473-530, Sept. 1982. Google Scholar
Digital Library
- StFu89 C.B. Stunkel and W. K. Fuchs, "TRAPEDS: Producing traces for mulficomputers via execution driven simulation", Proc. ACM Sigmetrics Conf. on Measurement and Modeling of Compter Systems,pp. 70-78, May 1989. Google Scholar
Digital Library
Index Terms
Stride directed prefetching in scalar processors
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