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Enhanced modulo scheduling for loops with conditional branches

Published:10 December 1992Publication History
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References

  1. 1 A. Charlesworth, "An approach to scientific array processing: The architectural design of the AP- 120B/FPS-164 family," in IEEE Computer, September 1981.Google ScholarGoogle Scholar
  2. 2 R. Touzeau, "A Fortran compiler for the FPS-164 Scientific Computer," in Proceedings of the SIGPLAN '8,1 Symposium on Compiler Construction, June 1984. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. 3 M. S. Lam, "Software pipelining: An effective scheduling technique for VLIW machines," in Proceedings ojf the A CM SIGPLAN 1988 Conference on Programming Language Design and Implementation, pp. 318-328, June 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. 4 R. L. Lee, A. Kwok, and F. Briggs, "The floating point performance of a superscalar SPARC processor," in Proceedings o/the $th International Conference on Architecture Support/or Programming Languages and Operating Systems, pp. 28-37, April 1989. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. 5 A. Aiken and A. Nicolau, "Optimal loop parallelization," in Proceedings o/ the A CM SIGPLAN 1988 Conference on Programming Language Design and Implementation, pp. 308-317, June 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. 6 K. Ebcioglu and T. Nakatani, "A new compilation technique for parallelizing loops with unpredictable branches on a VLIW architecture," in S~cond Workshop on Languages and Compiler's for Parallel Computing, August 1989. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. 7 B. Su and J. Wang, "GURPR*: A new global software pipelining algorithm," in Proceedings of the ~~th Annual Workshop on Microprogramming and Microarchitecture, pp. 212-216, November 1991. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. 8 J. H. Patel and E. S. Davidson, "Improving the throughput of a pipeline by insertion of delays," in Proceedings of the $rd International Symposium on Computer Architecture, pp. 159-164, 1976. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. 9 B. R. Rau and C. D. Glaeser, "Some scheduling techniques and an easily schedulable horizontal architecture for high performance scientific computing," in Proceedings of the ~Oth Annual Workshop on Microprogramming and Microarchitecture, pp. 183-198, October 1981. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. 10 M. Lam, A Systolic Array Optimizing Compiler. PhD thesis, Carnegie Mellon University, Pittsburg, PA, 1987. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. 11 C. Eisenbeis, "Optimization of horizontal microcode generation for loop structures," in international Conference on Supercomputing, pp. 453-465, July 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. 12 R. B. Jones and V. H. Allan, "Software pipelining: An evaluation of Enhanced Pipelining,' in Proceedings o/the ~dth International Workshop on Microprogramming and Microarchitecture, pp. 82-92, November 1991. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. 13 J. A. Fisher, "Trace scheduling: A technique for global microcode compaction," IEEE Transactions on Computers, vol. c-30, pp. 478-490, July 1981.Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. 14 B. R. Rau, D. W. L. Yen, W. Yen, and R. A. Towle, "The Cydra 5 departmental supercomputer,' IEEE Computer, pp. 12-35, January 1989. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. 15 J. C. Dehnert, P. Y. Hsu, and J. P. Bratt, "Overlapped loop support in the Cydra 5," in Proceedings o/ the Third International Conference on Architectural Support/or Programming Languages and Operating Systems, pp. 26-38, April 1989. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. 16 R. Towle, Control and Data Dependence/or Program Transformations. PhD thesis, Department of Computer Science, University of Illinois, Urbana, IL, 1976. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. 17 J. R. Allen, K. Kennedy, C. Porterfield, and J. Warren, "Conversion of control dependence to data dependence,'' in Proceedings o/ the l Oth A CM Symposium on Principles o/ Programming Languages, pp. 177-189, January 1983. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. 18 F. Gasperoni, "Compilation techniques for VLIW architectures," Tech. Rep. 66741, IBM Research Division, T.J. Watson Research Center, Yorktown Heights, NY 10598, August 1989.Google ScholarGoogle Scholar
  19. 19 N. J. Warter and W. W. Hwu, "Enhanced modulo scheduling," Tech. Rep. CRHC-92-11, Center for Reliable and High-Performance Computing, University of Illinois, Urbana, IL, November 1992.Google ScholarGoogle Scholar
  20. 20 J. C. H. Park and M. Schlansker, "On Predicated Execution," Tech. Rep. HPL-91-58, Hewlett Packard Software Systems Laboratory, May 1991.Google ScholarGoogle Scholar
  21. 21 A. Aho, R. Sethi, and J. Ullman, Compilers: Principles, Techniques, and Tools. Reading, MA: Addison- Wesley, 1986. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. 22 D. C. Lin, "Compiler support for predicated execution in superscalar processors," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 1992.Google ScholarGoogle Scholar
  23. 23 P. Tirumalai, M. Lee, and M. Schlansker, "Parallelization of loops with exits on pipelined architectures," in Supercomputing, November 1990. Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. 24 J. W. Bockhaus, "An implementation of GURPR*: A software pipelining algorithm," Master's thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, IL, 1992.Google ScholarGoogle Scholar
  25. 25 Intel, i860 6y-Bit Microprocessor. Santa Clara, CA, 1989.Google ScholarGoogle Scholar
  26. 26 N. J. Wafter, D. M. Lavery, and W. W. Hwu, "The benefit of Predicated Execution for software pipelining,' in Proceedings o.f the ~3rd Hawaii International Conference on System Sciences, to appear January 1993.Google ScholarGoogle Scholar
  27. 27 B. R. Rau, M. Lee, P. P. Tirumalai, and M. S. Schlansker, "Register allocation for software pipelined loops," in Proceedings o/the A CM SIGPLAN 9~ Conference on Programming Language Design and Implementation, pp. 283-299, June 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. 28 W. Y. Chen, S. A. Mahlke, N. J. Wafter, and W. W. Hwu, "Using profile information to assist advanced compiler optimization and scheduling," in Proceedings of the Fifth Workshop on Languages and Compilers for Parallel Computing, August 1992. Google ScholarGoogle ScholarDigital LibraryDigital Library

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                  cover image ACM SIGMICRO Newsletter
                  ACM SIGMICRO Newsletter  Volume 23, Issue 1-2
                  Dec. 1992
                  300 pages
                  ISSN:1050-916X
                  DOI:10.1145/144965
                  Issue’s Table of Contents
                  • cover image ACM Conferences
                    MICRO 25: Proceedings of the 25th annual international symposium on Microarchitecture
                    December 1992
                    301 pages
                    ISBN:0818631759

                  Copyright © 1992 Authors

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                  Association for Computing Machinery

                  New York, NY, United States

                  Publication History

                  • Published: 10 December 1992

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