
- BeDa91 M. E. Benitez and J. W. Davidson, "Code Generation for Streaming: an Access/Execute Mechanism", Proceedings of the Fourth International Conference on Architectural Support for Programming Languages and Operating Systems, Santa Clara, CA (April 8-11, 1991), pp. 132-141. Google Scholar
Digital Library
- CGKP87 G.L. Craig, I. R. Goodman, R. H. Katz, A. R. Pleszkun, K. Ramachandran, I. Sayah and J. E. Smith, "PIPE: A High Performance VLSI Processor Implementation", Journal of VLSI and Computer Systems, vol. 2 (1987). Google Scholar
Digital Library
- FaPl91 M. Farrens and A. Pleszkun, "Overview of the PIPE Processor Implementation", Proceedings of the 24th Annual Hawaii International Conference on System Sciences, Kapaa, Kauai (January 9-11, 1991), pp. 433-443.Google Scholar
Cross Ref
- GHLP85 J. R. Goodman, J. T. Hsich, K. Liou, A. R. Plcszkun, P. B. Schechter and H. C. Young, "PIPE: a VLSI Decoupled Architecture", Proceedings of the Twelveth Annual International Symposium on Computer Architecture(June 1985), pp. 20-27. Google Scholar
Digital Library
- McMa84 F. H. McMahon, LLNL FORTRAN KERNELS: MFLOPS, Lawrence Livermore Laboratories, Livermore, California, (March 1984).Google Scholar
Index Terms
MISC: a Multiple Instruction Stream Computer
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