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Digital Library
- 2 D. Kroft, "Lockup-free instruction fetch/prefetch cache organization," in Proc. 8th Ann. Int'l. $ymp. Computer Architecture, pp. 81-87, May 1981. Google Scholar
Digital Library
- 3 G.~ S. Sohi and M. Franklin, "High-bandwidth data memory systems for superscalar processors," in Proc. ~th Int'l. Conf. on Architectural Support for Prog. Lang. and Operating Systems., (Santa Clara, CA), pp. 53-62, Apr. 1991. Google Scholar
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- 4 "Spec newsletter," Feb. 1989. SPEC, Fremont, CA.Google Scholar
- 5 T. M. Conte, Systematic computer architecture protoiyping. PhD thesis, Department of Electrical and Computer Engineering, University of Illinois, Urbana, Illinois, 1992. Google Scholar
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Index Terms
Tradeoffs in processor/memory interfaces for superscalar processors
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