skip to main content
10.1145/1542452.1542470acmconferencesArticle/Chapter ViewAbstractPublication PagescpsweekConference Proceedingsconference-collections
research-article

Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring

Published:19 June 2009Publication History

ABSTRACT

The fine-grained parallelism inherent in FPGAs has encouraged their use in packet processing systems. Debugging and performance evaluation of such complex designs can be significantly improved through debug information that provides a system-level perspective and hides the complexity of signal-level debugging. In this paper we present a debugging system that permits transaction-based communication-centric monitoring of packet processing systems. We demonstrate, using two different examples, how this system can improve the debugging information and abstract lower level detail. Furthermore, we demonstrate that transaction monitoring systems require fewer resources than conventional RTL debugging systems and can provide a system-level perspective not permitted by traditional tools.

References

  1. Kevin Camera and Robert W. Brodersen. An integrated debugging environment for FPGA computing platforms. In International Conference on Field Programmable Logic and Applications (FPL), pages 311--316, Heidelberg, Germany, September 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Kevin Camera, Hayden Kwok-Hay So, and Robert W. Brodersen. An integrated debugging environment for reprogrammble hardware systems. In Proc. International Symposium on Automated Analysis-driven debugging (AADEBUG), pages 111--116, Monterey, California, USA, September 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. Kees Goossens, Calin Ciordas¸, Twan Basten, Andrei Radulescu, and Andre Boon. Transaction monitoring in networks on chip: The on-chip run-time perspective. In Proc. IEEE Symposium on Industrial Embedded Systems (SIES), pages 1--10, Antibes Juan-Les-Pins, France, October 2006.Google ScholarGoogle Scholar
  4. Kees Goossens, Bart Vermeulen, Remco van Steeden, and Martijn Bennebroek. Transaction-based communication-centric debug. In Proc. IEEE First International Symposium on Networks-on-Chip, pages 95--106, Princeton, NJ, USA, May 2007. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. Ulf Lamping, Richard Sharpe, and Ed Warnicke. Wireshark User's Guide. Wireshark Foundation, 2008. URL http://www.wireshark.org/.Google ScholarGoogle Scholar
  6. Orest Oltu, Petru L. Milea, and Alexandru Simion. Testing of digital circuitry using xilinx chipscope logic analyzer. In Proc. International Semiconductor Conference (CAS), pages 471--474, Sinaia, Romania, October 2005.Google ScholarGoogle ScholarCross RefCross Ref
  7. Lesley Shannon and Paul Chow. Maximizing system performance: Using reconfigurability to monitor system communications. In Proc. IEEE International Conference on Field-Programmable Technology (ICFPT), pages 231--238, Brisbane, Australia, December 2004.Google ScholarGoogle ScholarCross RefCross Ref
  8. Identify RTL Debugger. Synopsys, Inc., August 2008. URL http://www.synplicity.com/products/identify/.Google ScholarGoogle Scholar
  9. ChipScope Pro 10.1 Software and Cores User Guide. Xilinx, March 2008. URL http://www.xilinx.com/ise/optional_prod/cspro.htmGoogle ScholarGoogle Scholar

Index Terms

  1. Debugging FPGA-based packet processing systems through transaction-level communication-centric monitoring

    Recommendations

    Comments

    Login options

    Check if you have access through your login credentials or your institution to get full access on this article.

    Sign in
    • Published in

      cover image ACM Conferences
      LCTES '09: Proceedings of the 2009 ACM SIGPLAN/SIGBED conference on Languages, compilers, and tools for embedded systems
      June 2009
      188 pages
      ISBN:9781605583563
      DOI:10.1145/1542452
      • cover image ACM SIGPLAN Notices
        ACM SIGPLAN Notices  Volume 44, Issue 7
        LCTES '09
        July 2009
        176 pages
        ISSN:0362-1340
        EISSN:1558-1160
        DOI:10.1145/1543136
        Issue’s Table of Contents

      Copyright © 2009 ACM

      Publisher

      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 19 June 2009

      Permissions

      Request permissions about this article.

      Request Permissions

      Check for updates

      Qualifiers

      • research-article

      Acceptance Rates

      LCTES '09 Paper Acceptance Rate18of81submissions,22%Overall Acceptance Rate116of438submissions,26%
    • Article Metrics

      • Downloads (Last 12 months)1
      • Downloads (Last 6 weeks)1

      Other Metrics

    PDF Format

    View or Download as a PDF file.

    PDF

    eReader

    View online with eReader.

    eReader
    About Cookies On This Site

    We use cookies to ensure that we give you the best experience on our website.

    Learn more

    Got it!