ABSTRACT
Moore's Law has precipitated a crisis in the creation of hardware systems (ASICs and FPGAs)-how to design such enormously complex concurrent systems quickly, reliably and affordably? At the same time, portable devices, the energy crisis, and high performance computing present a related challenge-how to move complex and high-performance algorithms from software into hardware (for more speed and/or energy efficiency)?
In this talk I will start with a brief technical introduction to BSV, a language that directly addresses these concerns. It uses ideas from Guarded Atomic Actions (cf. Term Rewriting Systems, TLA+, Unity, and EventB) to address complex concurrency with scalability. It borrows from Haskell (types, type classes, higher-order functions) for robustness and powerful program generation (a.k.a. "static elaboration" to HW designers). And it is fully synthesizable (compilable) into high-quality RTL (Verilog/VHDL). I will then describe some of the remarkable projects that BSV has enabled in industry and academia today.
Index Terms
Using GPCE principles for hardware systems and accelerators: (bridging the gap to HW design)
Recommendations
Using GPCE principles for hardware systems and accelerators: (bridging the gap to HW design)
GPCE '09Moore's Law has precipitated a crisis in the creation of hardware systems (ASICs and FPGAs)-how to design such enormously complex concurrent systems quickly, reliably and affordably? At the same time, portable devices, the energy crisis, and high ...
From software to accelerators with LegUp high-level synthesis
CASES '13: Proceedings of the 2013 International Conference on Compilers, Architectures and Synthesis for Embedded SystemsEmbedded system designers can achieve energy and performance benefits by using dedicated hardware accelerators. However, implementing custom hardware accelerators for an application can be difficult and time intensive. LegUp is an open-source high-level ...
Teaching hardware/software codesign on a reconfigurable computing platform
ARC'12: Proceedings of the 8th international conference on Reconfigurable Computing: architectures, tools and applicationsThis paper reports on a practically oriented undergraduate course in Hardware/Software Codesign which uses an FPGA-based reconfigurable computing platform with a soft processor for analyzing and evaluating hardware/software trade-offs. The Altium ...







Comments