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Scheduling support for transactional memory contention management

Published:09 January 2010Publication History

ABSTRACT

Transactional Memory (TM) is considered as one of the most promising paradigms for developing concurrent applications. TM has been shown to scale well on >multiple cores when the data access pattern behaves "well," i.e., when few conflicts are induced. In contrast, data patterns with frequent write sharing, with long transactions, or when many threads contend for a smaller number of cores, result in numerous conflicts. Until recently, TM implementations had little control of transactional threads, which remained under the supervision of the kernel's transaction-ignorant scheduler. Conflicts are thus traditionally resolved by consulting an STM-level contention manager. Consequently, the contention managers of these "conventional" TM implementations suffer from a lack of precision and often fail to ensure reasonable performance in high-contention workloads.

Recently, scheduling-based TM contention-management has been proposed for increasing TM efficiency under high-contention [2, 5, 19]. However, only user-level schedulers have been considered. In this work, we propose, implement and evaluate several novel kernel-level scheduling support mechanisms for TM contention management. We also investigate different strategies for efficient communication between the kernel and the user-level TM library. To the best of our knowledge, our work is the first to investigate kernel-level support for TM contention management.

We have introduced kernel-level TM scheduling support into both the Linux and Solaris kernels. Our experimental evaluation demonstrates that lightweight kernel-level scheduling support significantly reduces the number of aborts while improving transaction throughput on various workloads.

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        • Published in

          cover image ACM Conferences
          PPoPP '10: Proceedings of the 15th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming
          January 2010
          372 pages
          ISBN:9781605588773
          DOI:10.1145/1693453
          • cover image ACM SIGPLAN Notices
            ACM SIGPLAN Notices  Volume 45, Issue 5
            PPoPP '10
            May 2010
            346 pages
            ISSN:0362-1340
            EISSN:1558-1160
            DOI:10.1145/1837853
            Issue’s Table of Contents

          Copyright © 2010 ACM

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          Association for Computing Machinery

          New York, NY, United States

          Publication History

          • Published: 9 January 2010

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