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Versatile system-level memory-aware platform description approach for embedded MPSoCs

Published:13 April 2010Publication History

ABSTRACT

In this paper, we present a novel system modeling language which targets primarily the development of source-level multiprocessor memory aware optimizations.

In contrast to previous system modeling approaches this approach tries to model the whole system and especially the memory hierarchy in a structural and semantically accessible way. Previous approaches primarily support generation of simulators or retargetable code selectors and thus concentrate on pure behavioral models or describe only the processor instruction set in a semantically accessible way, A simple, database-like, interface is offered to the optimization developer, which in conjunction with the MACCv2 framework enables rapid development of source-level architecture independent optimizations.

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            • Published in

              cover image ACM Conferences
              LCTES '10: Proceedings of the ACM SIGPLAN/SIGBED 2010 conference on Languages, compilers, and tools for embedded systems
              April 2010
              184 pages
              ISBN:9781605589534
              DOI:10.1145/1755888
              • cover image ACM SIGPLAN Notices
                ACM SIGPLAN Notices  Volume 45, Issue 4
                LCTES '10
                April 2010
                170 pages
                ISSN:0362-1340
                EISSN:1558-1160
                DOI:10.1145/1755951
                Issue’s Table of Contents

              Copyright © 2010 ACM

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              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 13 April 2010

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