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Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications

Published:01 December 2010Publication History
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Abstract

This article presents a novel configuration scrubbing core, used for internal detection and correction of radiation-induced configuration single and multiple bit errors, without requiring external scrubbing. The proposed technique combines the benefits of fast radiation-induced fault detection with fast restoration of the device functionality and small area and power overheads. Experimental results demonstrate that the novel approach significantly improves the availability in hostile radiation environments of FPGA-based designs. When implemented using a Xilinx XC2V1000 Virtex-II device, the presented technique detects and corrects single bit upsets and double, triple and quadruple multi bit upsets, occupying just 1488 slices and dissipating less than 30 mW at a 50MHz running frequency.

References

  1. Allen, G., Swift, G., Carmichael, C., and Tseng, C. 2007a. Initial single events testing of the Xilinx Virtex-4 field programmable gate array. In Proceedings of the Single Event Effects Symposium. http://www.trs-new.jpl.nasa.gov/dspace/bitstream!2014/40350/1/07-1205.pdf.Google ScholarGoogle Scholar
  2. Allen, G., Swift, G., Carmichael, C., Tseng, C., and Miller, G. 2007b. Upset measurements on Mil/Aero Virtex-4 FPGAs incorporating 90 nm features and a thin epitaxial layer. In Proceedings of the Military and Aerospace FPGA and Applications (MAFA) Meeting. http://nepp.nasa.gov/mafa/talks/MAFA07_24_Allen.pdf.Google ScholarGoogle Scholar
  3. Asadi, G.-H. and Tahoori, M. B. 2007. Analytical techniques for soft error rate modeling and mitigation of FPGA-based designs. IEEE Trans. VLSI Syst. 15, 12, 1320--1331. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. Berg, M., Poivey, C., Petrlck, D., Espinosa, D., Lesea, A., Label, K. A., Friendlich, M., Kim, H., and Phan, A. 2008. Effectiveness of internal versus external SEU scrubbing mitigation strategies in a Xilinx FPGA: Design, test, and analysis. IEEE Trans. Nucl. Sci. 55, 4, 2259--2266.Google ScholarGoogle ScholarCross RefCross Ref
  5. Bridgford, B., Carmichael, C., and Wei Tseng, C. 2008. Single-event upset mitigation selection guide. Xilinx Application Note XAPP987. http://www.xilinx.com/support/documentation/application_notes/xapp987.pdf.Google ScholarGoogle Scholar
  6. Carmichael, C. 2006. Triple modular redundancy design techniques for Virtex FPGAs Xilinx. Xilinx Application Note XAPP 197. http://www.xilinx.com/support!documentation/application_notes/xapp 197.pdf.Google ScholarGoogle Scholar
  7. Carmichael, C. and Tseng, C. W. 2008. Correcting single-event upsets with a self-hosting configuration management core. Xilinx Application Note XAPP989. http://www.xilinx.com/support/documentation/application_notes/xapp989.pdf.Google ScholarGoogle Scholar
  8. Carmichael, C. and Tseng, C. W. 2009. Correcting single-event upsets in Virtex-4 FPGA configuration memory. Xilinx Application Note, XAPP988. http://www.xilinx.com/support/documentation/application_notes/xapp988.pdf.Google ScholarGoogle Scholar
  9. Carmichael, C., Caffrey, M., and Salazar, A. 2000. Correcting single-event upsets through Virtex partial configuration. Xilinx Application Note XAPP216. http://www.xilinx.com!support/documentation/application_notes/xapp216.pdf.Google ScholarGoogle Scholar
  10. Ceschia, M., Violante, M., Reorda, M. S., Paccagnella, A., Bernardi, P., Rebaudengo, M., Bortolato, D., Bellato, M., Zambolin, P., and Candelori, A. 2003. Identification and classification of single-event upsets in the configuration memory of SRAM-based FPGAs. IEEE Trans. Nucl. Sci. 50, 6, 2088--2094.Google ScholarGoogle ScholarCross RefCross Ref
  11. Chapman, K. 2003. KCPSM3 8-bit Micro Controller for Spartan-3, Virtex-II and Virtex-II PRO. www.xilinx.com.Google ScholarGoogle Scholar
  12. Chapman, K. and Jones, L. 2009. SEU strategies for Virtex-5 devices. Xilinx Application Note XAPP864. http://www.xilinx.com/support/documentation/application_notes/xapp 864.pdf.Google ScholarGoogle Scholar
  13. Gericota, M. G., Lemos, L. F., Alves, G. R., and Ferriera, J. M. 2007. A framework for self-healing radiation-tolerant implementations on reconfigurable FPGAs. In Proceedings of the IEEE Conference on Design and Diagnostics of Electronic Circuits and Systems (DDECS’07). 1--6.Google ScholarGoogle Scholar
  14. Gokhale, M., Graham, P., Wirthlin, M., Johnson, D. E., and Rollins, N. 2006. Dynamic reconfiguration for management of radiation-induced faults in FPGAs. Int. J. Embed Syst. 2, 1/2, 28--38.Google ScholarGoogle Scholar
  15. Graham, P., Caffrey, M., Zimmerman, J., Sundararajan, P., Johnson, E., and Patterson, E. 2003. Consequences and categories of SRAM FPGA configuration SEUs. In Proceedings of the International Conference on Military and Aerospace Programmable Logic Devices (MAPLD’03).Google ScholarGoogle Scholar
  16. Heiner, J., Collins, N., and Withlin, M. 2008. Fault tolerant ICAP controller for high-reliable internal scrubbing. In Proceedings of the IEEE Aerospace Conference. 1--10.Google ScholarGoogle Scholar
  17. ISCAS. 1999. ISCAS99 circuit benchmarks. http://www.pld.ttu.ee/-maksimlbenchmarks/iscas99/vhdl/.Google ScholarGoogle Scholar
  18. Koga, R., George, J., Swift, G., Yui, C., Edmonds, L., Carmichael, C., Langley, T., Murray, P., Lanes, K., and Napier, M. 2004. Comparison of Xilinx Virtex-II FPGA SEE sensitivities to protons and heavy ions. IEEE Trans. Nucl. Sci. 51, 5, 2825--2833.Google ScholarGoogle ScholarCross RefCross Ref
  19. Lanuzza, M., Zicari, P., Frustaci, F., Perrj, S., and Corsonello, P. 2009. An efficient and low-cost design methodology to improve SRAM-based FPGA robustness in space and avionics applications. In Proceedings of the 5th International Workshop on Reconfigurable Computing: Architectures, Tools and Applications (ARC’09). Lecture Notes in Computer Science, vol. 5453, Springer, 74--84. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. Memec-Design, Virtex II MB. www.insight.na.memec.comlMemec/iplanet/linkl.Google ScholarGoogle Scholar
  21. Moon, T. K. 2005. Error Correction Coding. John Wiley & Sons.Google ScholarGoogle Scholar
  22. Morgan, K., Caffrey, M., Graham, P., Johnson, E., Pratt, B., and Wirthlin, M. 2005. SEU-induced persistent error propagation in FPGAs. IEEE Trans. Nucl. Sci. 52, 6, 2438--2445.Google ScholarGoogle ScholarCross RefCross Ref
  23. Ostler, P., Caffrey, M., Gibelyou, D., Graham, P., Morgan, K., Pratt, B., Quinn, H., and Wirthlin, M. 2008. FPGA system error rate analysis for harsh radiation environments. In Proceedings of the International Conference on Military and Aerospace Programmable Logic Devices (MAPLD’08).Google ScholarGoogle Scholar
  24. Quinn, H., Graham, P., Krone, J., Caffrey, M., and Rezgui, S. 2005. Radiation-induced multi-bit upsets in SRAM-based FPGAs. IEEE Trans. Nucl. Sci. 52, 6, 2455--2461.Google ScholarGoogle ScholarCross RefCross Ref
  25. Quinn, H., Morgan, K., Graham, P., Krone, J., Caffrey, M., and Lundgreen, K. 2007. Domain crossing errors: Limitations on single device triple-modular redundancy circuits in Xilinx FPGAs. IEEE Trans. Nucl. Sci. 54, 6, 2037--2043.Google ScholarGoogle ScholarCross RefCross Ref
  26. Rollins, N., Wirthlin, M. J., and Graham, P. 2004. Evaluation of power costs in applying TMR to FPGA designs. In Proceedings of the International Conference on Military and Aerospace Programmable Logic Devices (MAPLD’04).Google ScholarGoogle Scholar
  27. Roosta, R. 2004. A comparison of radiation-hard and radiation-tolerant FPGAs for space applications. NASA Electronic Parts and Packaging Program. http://nepp.nasa.gov/.Google ScholarGoogle Scholar
  28. Samudrala, P. K., Ramos, J., and Katkoori, S. 2004. Selective triple modular redundancy (STMR) based single-event upset (SEU) tolerant synthesis for FPGAs. IEEE Trans. Nucl. Sci. 51, 5, 2957--2969.Google ScholarGoogle ScholarCross RefCross Ref
  29. Stepien, P. and Vasilko, M. 2006. On feasibility of FPGA bitstream compression during placement and routing. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL’06). 1--4.Google ScholarGoogle Scholar
  30. Swift, G. M., Rezgui, S., George, J., Carmichael, C., Napier, M., Maksymowicz, J., Moore, J., Lesea, A., Koga, K., and Wrobel, T. F. 2004. Dynamic testing of Xilinx Virtex-II field programmable gate array (FPGA) input/output blocks (lOB’s). IEEE Trans. Nucl. Sci. 51, 6, 3469--3474.Google ScholarGoogle ScholarCross RefCross Ref
  31. Xilinx. 2000. Chipscope Software and ILA Cores User Manual, Xilinx User Manual, 0401884 (v2.0).Google ScholarGoogle Scholar
  32. Xilinx. 2005. Virtex FPGA Series Configuration and Readback. Xilinx Application Note XAPP 138, http://www.xilinx.com/support/documentationlapplication_notes/xapp138.pdf.Google ScholarGoogle Scholar
  33. Xilinx. 2007. Virtex-II Platform FPGA, User Guide. http://www.xilinx.comlbvdocs/userguides/ug002.pdf.Google ScholarGoogle Scholar
  34. Yui, E. E., Swift, G. M., Carmichael, C., Koga, R., and George, J. S. 2003. SEU Mitigation Testing of Xilinx Virtex II FPGAs. Radiation Effects Data Workshop, 92--97.Google ScholarGoogle Scholar

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  1. Exploiting Self-Reconfiguration Capability to Improve SRAM-based FPGA Robustness in Space and Avionics Applications

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      • Published in

        cover image ACM Transactions on Reconfigurable Technology and Systems
        ACM Transactions on Reconfigurable Technology and Systems  Volume 4, Issue 1
        December 2010
        233 pages
        ISSN:1936-7406
        EISSN:1936-7414
        DOI:10.1145/1857927
        Issue’s Table of Contents

        Copyright © 2010 ACM

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 1 December 2010
        • Accepted: 1 November 2009
        • Revised: 1 September 2009
        • Received: 1 April 2009
        Published in trets Volume 4, Issue 1

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