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Characterization of Fixed and Reconfigurable Multi-Core Devices for Application Acceleration

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Published:01 November 2010Publication History
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Abstract

As on-chip transistor counts increase, the computing landscape has shifted to multi- and many-core devices. Computational accelerators have adopted this trend by incorporating both fixed and reconfigurable many-core and multi-core devices. As more, disparate devices enter the market, there is an increasing need for concepts, terminology, and classification techniques to understand the device tradeoffs. Additionally, computational performance, memory performance, and power metrics are needed to objectively compare devices. These metrics will assist application scientists in selecting the appropriate device early in the development cycle. This article presents a hierarchical taxonomy of computing devices, concepts and terminology describing reconfigurability, and computational density and internal memory bandwidth metrics to compare devices.

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      • Published in

        cover image ACM Transactions on Reconfigurable Technology and Systems
        ACM Transactions on Reconfigurable Technology and Systems  Volume 3, Issue 4
        November 2010
        240 pages
        ISSN:1936-7406
        EISSN:1936-7414
        DOI:10.1145/1862648
        Issue’s Table of Contents

        Copyright © 2010 ACM

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 1 November 2010
        • Accepted: 1 June 2009
        • Revised: 1 May 2009
        • Received: 1 October 2008
        Published in trets Volume 3, Issue 4

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