Hardware accelerated rendering of CSG and transparency

ABSTRACT

This paper describes algorithms for implementing accurate rendering of CSG and transparency in a hardware 3D accelerator. The algorithms are based on a hardware architecture which performs front-to-back Z-sorted shading; a multiple-pass algorithm which allows an unlimited number of Z-sorted object layers is also described. The multiple-pass algorithm has been combined with an image partitioning algorithm to improve efficiency, and to improve performance of the resulting hardware implementation.

References

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Index Terms

• Computing methodologies

  • Computer graphics

    • Graphics systems and interfaces

    • Image manipulation

    • Rendering

      • Rasterization

      • Visibility

    • Shape modeling

      • Volumetric models

• Hardware

  • Communication hardware, interfaces and storage

    • Displays and imagers