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Flikker: saving DRAM refresh-power through critical data partitioning

Published:05 March 2011Publication History

ABSTRACT

Energy has become a first-class design constraint in computer systems. Memory is a significant contributor to total system power. This paper introduces Flikker, an application-level technique to reduce refresh power in DRAM memories. Flikker enables developers to specify critical and non-critical data in programs and the runtime system allocates this data in separate parts of memory. The portion of memory containing critical data is refreshed at the regular refresh-rate, while the portion containing non-critical data is refreshed at substantially lower rates. This partitioning saves energy at the cost of a modest increase in data corruption in the non-critical data. Flikker thus exposes and leverages an interesting trade-off between energy consumption and hardware correctness. We show that many applications are naturally tolerant to errors in the non-critical data, and in the vast majority of cases, the errors have little or no impact on the application's final outcome. We also find that Flikker can save between 20-25% of the power consumed by the memory sub-system in a mobile device, with negligible impact on application performance. Flikker is implemented almost entirely in software, and requires only modest changes to the hardware.

References

  1. T. Austin, V. Bertacco, D. Blaauw, and T. Mudge. Opportunities and challenges for better than worst-case design. In Proceedings of the Asia South Pacific design automation conference, pages 2--7, 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. W. Baek and T. M. Chilimbi. Green: a framework for supporting energy-conscious programming using controlled approximation. In ACM SIGPLAN Conference on Programming language design and implementation, PLDI '10, pages 198--209, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. Vimal Bhalodia. SCALE DRAM subsystem power analysis. Master's thesis, Massachusetts Institute of Technology, 2005.Google ScholarGoogle Scholar
  4. S. Borkar. Microarchitecture and design challenges for gigascale integration. In Proceedings of the International Symposium on Microarchitecture (MICRO), 2004. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. Kirk W. Cameron, Rong Ge, and Xizhou Feng. High-performance, power-aware distributed computing for scientific applications. Computer, 38:40--47, 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. A. Carroll and G. Heiser. An analysis of power consumption in a smartphone. Usenix Annual Technical Conference (ATC), 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. S. Chandra and P.M. Chen. The impact of recovery mechanisms on the likelihood of saving corrupted state. In International Symposium on Software Reliability Engineering (ISSRE), page 91, 2002. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. Y. Chen, O. Gnawali, M. Kazandjieva, P. Levis, and J. Regehr. Surviving sensor-networks software faults. In Proceedings of the International Symposium on Operating Systems Design (SOSP). ACM New York, NY, USA, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. Tezzaron corporation. Soft errors in electronic memory (white paper), 2005. Available from http://www. tezzaron.com/about/papers/Papers.htm.Google ScholarGoogle Scholar
  10. Marc de Kruijf, Shuou Nomura, and Karthikeyan Sankaralingam. Relax: an architectural framework for software recovery of hardware faults. International Symposium on Computer Architecture (ISCA), pages 497--508, 2010. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. C. Ellis, A. Lebeck, and A. Vahdat. System support for energy management in mobile and embedded workloads (white paper). Technical report, Duke University, 1999.Google ScholarGoogle Scholar
  12. D. et al. Ernst. Razor: A low-power pipeline based on circuit-level timing speculation. In Proceedings of the 36th annual IEEE/ACM International Symposium on Micro-architecture (MICRO), 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Martin Fierz. 4 in a row. Available from http://www.fierz.ch/4inarow.htm.Google ScholarGoogle Scholar
  14. J. Flinn, K.I. Farkas, and J. Anderson. Power and energy characterization of the Itsy pocket computer (version 1.5). Compaq Western Research Laboratory, Tech. Rep, 2000.Google ScholarGoogle Scholar
  15. M. Ghosh and H.H.S. Lee. Smart refresh: An enhanced memory controller design for reducing energy in conventional and 3D die-stacked DRAMs. In Proceedings of the 40th Annual IEEE/ACM International Symposium on Micro-architecture(MICRO). Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. H. Hoffmann, S. Misailovic, S. Sidiroglou, A. Agarwal, and M. Rinard. Using code perforation to improve performance, reduce energy consumption, and respond to failures. Technical report, Technical Report Massacchusets Institute for Technology, 2009.Google ScholarGoogle Scholar
  17. Henry Hoffmann, Stelios Sidiroglou, Michael Carbin, Sasa Misailovic, Anant Agarwal, and Martin Rinard. Dynamic knobs for responsive power-aware computing. In Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS'11), March 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. Micron Technology Inc. 1gb mobile LPDDR. Available from http://www.micron.com/products/partdetail?part=MT46H32M32LFCG-5 IT.Google ScholarGoogle Scholar
  19. Micron Technology Inc. System power calculator. Available from http://www.micron.com/support/designsupport/tools/powercalc/powercalc.Google ScholarGoogle Scholar
  20. Ciji Isen and Lizy John. Eskimo - energy savings using semantic knowledge of inconsequential memory occupancy for DRAM subsystem. In Proceedings of the International Conference on Microarchitecture (MICRO). IEEE, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. A.K. Karlson, B.R. Meyers, A. Jacobs, P. Johns, and S.K. Kane. Working Overtime: Patterns of Smartphone and PC Usage in the Day of an Information Worker. In Pervasive Computing: 7th International Conference, Pervasive 2009, May 11--14, 2009, Proceedings, page 398. Springer, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  22. Y. Katayama, E.J. Stuckey, S. Morioka, and Z. Wu. Fault-Tolerant Refresh Power Reduction of DRAMs for Quasi-Nonvolatile Data Retention. In International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT-VLSI), volume 311, page 318, 1999. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. J. Kim and MC Papaefthymiou. Block-based multiperiod dynamic memory design for low data-retention power. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 11(6):1006--1018, 2003. Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. Craig Kolb. Rayshade graphics program. Available from http://www-graphics.stanford.edu/ cek/rayshade.Google ScholarGoogle Scholar
  25. Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. Architecting phase change memory as a scalable DRAM alternative. International Symposium on Computer Architecture (ISCA), 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. Chunho Lee, Miodrag Potkonjak, and William H. Mangione-Smith. Mediabench: a tool for evaluating and synthesizing multimedia and communicatons systems. In Proceedings of the 30th annual ACM/IEEE International Symposium on Microarchitecture, 1997. Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. C. Lefurgy, K. Rajamani, F. Rawson, W. Felter, M. Kistler, and T.W. Keller. Energy management for commercial servers. Computer. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. Xuanhua Li and Donald Yeung. Application-level correctness and its impact on fault tolerance. International Symposium on High-Performance Computer Architecture (HPCA), 0:181--192, 2007. Google ScholarGoogle ScholarDigital LibraryDigital Library
  29. Chi-Keung et. al. Luk. Pin: Building customized program analysis tools with dynamic instrumentation. In ACM SIGPLAN Conference on Programming Language design and implementation (PLDI), pages 190--200, New York, NY, USA, 2005. ACM. Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. M. Murphy. Beginning Android. Apress, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  31. K. Patel, E. Macii, M. Poncino, and L. Benini. Energy-Efficient Value Based Selective Refresh for Embedded DRAMS. Lecture Notes in Computer Science (LNCS), 3728:466, 2005. Google ScholarGoogle ScholarDigital LibraryDigital Library
  32. Karthik Pattabiraman, Vinod Grover, and Benjamin G. Zorn. Samurai: protecting critical data in unsafe languages. In Eurosys '08: Proceedings of the 3rd ACM SIGOPS/EuroSys European Conference on Computer Systems 2008, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  33. Mastooreh Salajegheh, Yue Wang, Kevin Fu, Anxiao (Andrew) Jiang, and Erik Learned-Miller. Exploiting half-wits: Smarter storage for low-power devices. In Proceedings of the 9th USENIX Conference on File and Storage Technologies (FAST '11), February 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  34. John Satori, Joseph Sloan, and Rakesh Kumar. Fluid NMR-performing power/reliability tradeoffs for applications with error tolerance. Workshop on Power Aware Computing and Systems (HotPower'09), 2009.Google ScholarGoogle Scholar
  35. SPEC. SPEC CPU2000. Available from http://www.spec.org/cpu2000.Google ScholarGoogle Scholar
  36. Ravi K. Venkatesan, Stephen Herr, and Eric Rotenberg. Retention-aware placement in DRAM (RAPID): software methods for quasi-non-volatile DRAM. In Proceedings of the International Symposium on High-Performance Computer Architecture (HPCA), 2006.Google ScholarGoogle ScholarCross RefCross Ref
  37. M. Weiser, B. Welch, A. Demers, and S. Shenker. Scheduling for reduced CPU energy. Kluwer International Series in Engineering and Computer Science, pages 449--472, 1996.Google ScholarGoogle ScholarCross RefCross Ref
  38. V. Wong and M. Horowitz. Soft Error Resilience of Probabilistic Inference Applications. SELSE II, 2006.Google ScholarGoogle Scholar
  39. W. Yuan, K. Nahrstedt, SV Adve, DL Jones, and RH Kravets. GRACE-1: Cross-layer adaptation for multimedia quality and battery energy. IEEE Transactions on Mobile Computing, 5(7). Google ScholarGoogle ScholarDigital LibraryDigital Library

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