Abstract
This article presents our methodology for implementing self-adaptivness within an OS-based and reconfigurable embedded system according to objectives such as quality of service, performance, or power consumption. We detail our approach to separate application-specific decisions and hardware/software-implementation decisions at system level. The former are related to the efficiency control of applications and based on the knowledge of application engineers. The latter are generic and address the choice between various hardware and software implementations according to user objectives. The decision management is implemented as an adaptive closed-loop model. We describe how each design step may be implemented and especially how we solved the issue of stability. Finally, we present a video-tracking application implemented on a FPGA to demonstrate the effectiveness of our solution, results are given for a system built around a NIOS soft-core with μCOS II RTOS and new services for managing hardware and software tasks transparently.
- Albonesi, D. 1999. Selective cache ways: On-demand cache resource allocation. In Proceedings of the 32nd Annual International Symposium on Micro-Architecture. IEEE, Los Alamitos, CA. Google Scholar
Digital Library
- Andrews, D., Sass, R., Anderson, E., Agron, J., Peck, W., Stevens, J., Baijot, F., and Komp, E. 2006. The case for high-level programming models for reconfigurable computers. In Proceedings of the International Conference on Engineering of Reconfigurable Systems & Algorithms. CSREA Press, Irvine, CA.Google Scholar
- Bergmann, N., Williams, J., Han, J., and Chen, Y. 2006. A process model for hardware modules in reconfigurable system-on-chip. In Proceedings of the International Symposium on Applied Reconfigurable Computing. Springer, Berlin, 205--214.Google Scholar
- Bomel, P., Gogniat, G., and Diguet, J-Ph. 2008. A networked, lightweight and partially reconfigurable platform. In Proceedings of the International Symposium on Applied Reconfigurable Computing. Springer, Berlin. Google Scholar
Digital Library
- Dave, B., Lakshminarayana, G., and Jha, N. 1999. Cosyn: Hardware-software co-synthesis of heterogeneous distributed embedded systems. IEEE Trans. Softw. Engin. 7, 1. Google Scholar
Digital Library
- De Borda, J.-C. 1781. Mémoire sur les élections au scrutin (in French). Histoire de l'Académie Royale des Sciences, Paris.Google Scholar
- Eustache, Y. and Diguet, J.-P. 2008. Reconfiguration management in the context of RTOS-based HW/SW embedded systems. EURASIP J. Embedded Syst. (Special Issue on Operating System Support for Embedded Real-Time Applications.) Google Scholar
Digital Library
- Goddard, L., Moy, C., and Palicot, J. 2006. From a configuration management to a cognitive radio management system of SDR systems. In Proceedings of the International Conference on Cognitive Oriented Wireless Networks and Communication Radio. IEEE, Los Alamitos, CA.Google Scholar
- Gu, Y. and Chakraborty, S. 2008. Control theory-based DVS for interactive 3D games. In Proceedings of the Design Automation Conference. ACM, New York, 740--745. Google Scholar
Digital Library
- Kaufmann, P. and Platzner, M. 2008. Towards self-adaptive embedded systems: Multi-objective hardware solution. In Proceedings of the International Workshop on Applied Reconfigurable Computing. Springer, Berlin.Google Scholar
- Liang, J., Laffely, A., Srinivasan, S., and Tessier, R. 2004. An architecture and compiler for scalable on-chip communication. IEEE Trans. VLSI Syst. 12, 7, 711--726. Google Scholar
Digital Library
- Lu, C., Stankovic, J., Tao, G., and Son, S. 2002. Feedback control real-time scheduling: Framework, modeling and algorithm. J. Control Theor. Approaches Real-Time Comput. (Special issue of RT Systems.) 23, 1/2, 85--126. Google Scholar
Digital Library
- Lübbers, E. and Platzner, M. 2007. Reconos: An RTOS supporting hard and software threads. In Proceedings of the International Conference on Field Programmable Logic and Applications. IEEE, Los Alamitos, Ca.Google Scholar
- Manne, S., Klauser, A., and Grunwald, D. 1998. Pipeline gating: Speculation control for energy reduction. In Proceedings of the 25th International Symposium on Computer Architecture. ACM, New York, 132--141. Google Scholar
Digital Library
- Maro, R., Bai, Y., and Bahar, R. 2000. Dynamically reconfiguring processor resources to reduce power consumption in high-performance processors. In Proceedings of the Workshop on Power-Aware Computer Systems. Springer, Berlin. Google Scholar
Digital Library
- Mignolet, J.-Y., Nollet, V., Coene, P., Verkest, D., Vernalde, S., and Lauwereins, R. 2003. Infrastructure for design and management of relocatable tasks in a heterogeneous reconfigurable system-on-chip. In Proceedings of the Design, Automation, and Test in Europe Conference. IEEE, Los Alamitos, CA. Google Scholar
Digital Library
- So, H., Tkachenko, A., and Brodersen, R. 2006. A unified hardware/-software runtime environment for fpga-based reconfigurable computers using borph. In Proceedings of the 4th International Conference on HW-SW Co-Design and System Synthesis. ACM, New York. Google Scholar
Digital Library
- Wong, J., Qu, G., and Potkonjak, M. 2003. An online approach for power minimization in qos sensitive systems. In Proceedings of the Asia and South Pacific Design Automation Conference. IEEE, Los Alamitos, CA. Google Scholar
Digital Library
Index Terms
Closed-loop--based self-adaptive Hardware/Software-Embedded systems: Design methodology and smart cam case study
Recommendations
SOFTENIT: a methodology for boosting the software content of system-on-chip designs
GLSVLSI '05: Proceedings of the 15th ACM Great Lakes symposium on VLSIEmbedded software is a preferred choice for implementing system functionality in modern System-on-Chip (SoC) designs, due to the high flexibility, and lower engineering costs provided by software over hardware. With continuous improvements in embedded ...
FPGA implementation of a HW/SW platform for multimedia embedded systems
This paper presents a HW/SW platform for embedded video system. It has been designed around an embedded RISC processor and FPGA technologies and provides video input and output interfaces. The configurable platform has been used to implement a real time ...
The Software and Hardware Integration Linker for Reconfigurable Embedded System
CSE '09: Proceedings of the 2009 International Conference on Computational Science and Engineering - Volume 02Accelerators are used to speed up demanding computational applications. However, designers find integrating hardware and software communications interface being a challenge. In this paper, the integration methods for computing in reconfigurable embedded ...






Comments