Abstract
This paper presents a microcode generator, which accepts a source program (algorithm) and a target description (microarchitecture) as input and generates microcode to implement the algorithm on the defined microarchitecture. The target description is similar to the outputs produced by datapath synthesis phase in hardware design packages. Thus, it can be incorporated to synthesise a microprogrammed control.
The microcode generator is based on an algorithm which preserves retargetability without sacrificing on design time. This is achieved by implementing the generator in two phases: in the first phase, a set of 'feasible' register transfer operations (called base-set) is generated from the microarchitecture description. In the second phase, translation is carried out by simply searching and matching the source program statements with the base-set.
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- 3 Peter Marwedel, "A retargetable microcode generation system for a high level microprogramming language", MICRO-14, pp. 115-123, 1981. Google Scholar
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- 4 Robert J. Sheraga and J.L. Gieser "Experiments in Automatic microcode generation", IEEE Trans. Comp. C-32, June 1983, pp. 557-568.Google Scholar
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- 5 M. Balakrishnan, "A Microprogram Generating System with emphasis on signal processing architeo tures", PhD Dissertation, 1984, IIT Delhi, New Delhi, INDIA.Google Scholar
Index Terms
An efficient retargetable microcode generator
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An efficient retargetable microcode generator
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