Abstract
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stream as it executes on the processor. The input native instruction stream to Dynamo can be dynamically generated (by a JIT for example), or it can come from the execution of a statically compiled native binary. This paper evaluates the Dynamo system in the latter, more challenging situation, in order to emphasize the limits, rather than the potential, of the system. Our experiments demonstrate that even statically optimized native binaries can be accelerated Dynamo, and often by a significant degree. For example, the average performance of --O optimized SpecInt95 benchmark binaries created by the HP product C compiler is improved to a level comparable to their --O4 optimized version running without Dynamo. Dynamo achieves this by focusing its efforts on optimization opportunities that tend to manifest only at runtime, and hence opportunities that might be difficult for a static compiler to exploit. Dynamo's operation is transparent in the sense that it does not depend on any user annotations or binary instrumentation, and does not require multiple runs, or any special compiler, operating system or hardware support. The Dynamo prototype presented here is a realistic implementation running on an HP PA-8000 workstation under the HPUX 10.20 operating system.
- Auslander, J., Philipose, M., Chambers, C., Eggers, S.J., and Bershad, B.N. 1996. Fast, effective dynamic compilation. In Proceedings of the SIGPLAN'96 Conference on Programming Language Design and Implementation (PLDI'96). Google Scholar
Digital Library
- Bala, V., Duesterwald, E., and Banerjia, S. 1999. Transparent dynamic optimization: The design and implementation of Dynamo. Hewlett Packard Laboratories Technical Report HPL-1999-78. June 1999.Google Scholar
- Bala V., and Freudenberger, S. 1996. Dynamic optimization: the Dynamo project at HP Labs Cambridge (project proposal). HP Labs internal memo, Feb 1996.Google Scholar
- Ball, T., and Larus, J.R. 1996. Efficient path profiling. In Proceedings of the 29th Annual International Symposium on Microarchitecture (MICRO-29), Paris. 46--57. Google Scholar
Digital Library
- Bedichek, R. 1995. Talisman: fast and accurate multicomputer simulation. In Proceedings of the 1995 ACM SIGMETRICS Conference on Measurement and Modeling of Computer Systems. Google Scholar
Digital Library
- Chambers, C., and Ungar, D. 1989. Customization: optimizing compiler technology for Self, a dynamically-typed object-orientied programming language. In Proceedings of the SIGPLAN'89 Conference on Programming Language Design and Implementation. 146--160. Google Scholar
Digital Library
- Chernoff, A., Herdeg, M., Hookway, R., Reeve, C., Rubin, N., Tye, T., Yadavalli, B., and Yates, J. 1998. FX!32: a profile-directed binary translator. IEEE Micro, Vol 18, No. 2, March/April 1998. Google Scholar
Digital Library
- Cmelik, R.F., and Keppel, D. 1993. Shade: a fast instruction set simulator for execution profiling. Technical Report UWCSE-93-06-06, Dept. Computer Science and Engineering, University .of Washington. Google Scholar
Digital Library
- Consel, C., and Noel, F. 1996. A general approach for runtime specialization and its application to C. In Proceedings of the 23th Annual Symposium on Principles of Programming Languages. 145--156. Google Scholar
Digital Library
- Cramer, T., Friedman, R., Miller, T., Seberger, D., Wilson, R., and Wolczko, M. 1997. Compiling Java Just In Time. IEEE Micro, May/Jun 1997. Google Scholar
Digital Library
- Deutsch, L.P. and Schiffman A.M. 1984. Efficient implementation of the Smalltalk-80 system. In Proceedings of the 11th Annual ACM Symposium on Principles of Programming Languages. 297--302. Google Scholar
Digital Library
- Ebcioglu K., and Altman, E.R. 1997. DAISY: Dynamic compilation for 100% architectural compatibility. In Proceedings of the 24th Annual International Symposium on Computer Architecture. 26--37. Google Scholar
Digital Library
- Engler, D.R. 1996. VCODE: a retargetable, extensible, very fast dynamic code generation system. In Proceedings of the SIGPLAN'96 Conference on Programming Language Design and Implementation (PLDI'96). Google Scholar
Digital Library
- Fisher, J., and Freudenberger, S. 1992. Predicting conditional branch directions from previous runs of a program. In Proceedings of the 5th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 5). Oct 1992. 85--95. Google Scholar
Digital Library
- Friendly, D.H., Patel, S.J., and Patt., Y.N. 1998. Putting the fill unit to work: dynamnic optimizations for trace cache microprocessors. In Proceedings of the 31st Annual Internation Symposium on Microarchitecture (MICRO-31), Dallas. 173--181. Google Scholar
Digital Library
- Grant, B., Philipose, M., Mock, M., Chambers, C., and Eggers, S.J. An evaluation of staged run-time optimizations in DyC. In Proceedings of the SIGPLAN'99 Conference on Programming Language Design and Implementation. 293--303. Google Scholar
Digital Library
- Herold, S.A. 1998. Using complete machine simulation to understand computer system behavior. Ph.D. thesis, Dept. Computer Science, Stanford University.Google Scholar
- Hwu, W.W., Mahlke, S.A., Chen, W.Y., Chang, P. P., Warter, N.J., Bringmann, R.A., Ouellette, R.Q., Hank, R.E., Kiyohara, T., Haab, G.E., Holm, J.G., and Lavery, D.M. 1993.The superblock: an effective structure for VLIW and superscalar compilation. The Journal of Supercomputing 7, (Jan.). 229--248. Google Scholar
Digital Library
- Keller, J. 1996. The 21264: a superscalar Alpha processor with out-of-order execution. Presented at the 9th Annual Microprocessor Forum, San Jose, CA.Google Scholar
- Kelly, E.K., Cmelik, R.F., and Wing, M.J. 1998. Memory controller for a microprocessor for detecting a failure of speculation on the physical nature of a component being addressed. U.S. Patent 5,832,205, Nov. 1998.Google Scholar
- Kumar, A. 1996. The HP PA-8000 RISC CPU: a high performance out-of-order processor. In Proceedings of Hot Chips VIII, Palo Alto, CA.Google Scholar
- Leone, M. and Dybvig, R.K. 1997. Dynamo: a staged compiler architecture for dynamic program optimization. Technical Report #490, Dept. of Computer Science, Indiana University.Google Scholar
Index Terms
Dynamo: a transparent dynamic optimization system
Recommendations
Dynamo: a transparent dynamic optimization system
We describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stream as it executes on the processor. The input native instruction stream to ...
Dynamo: a transparent dynamic optimization system
PLDI '00: Proceedings of the ACM SIGPLAN 2000 conference on Programming language design and implementationWe describe the design and implementation of Dynamo, a software dynamic optimization system that is capable of transparently improving the performance of a native instruction stream as it executes on the processor. The input native instruction stream to ...
The integral equation approach to kinematic dynamo theory and its application to dynamo experiments in cylindrical geometry
The conventional magnetic induction equation that governs hydromagnetic dynamo action is transformed into an equivalent integral equation system. An advantage of this approach is that the computational domain is restricted to the region occupied by the ...






Comments