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Making alive register transfer level and transaction level modeling in Ada

Published:22 February 2012Publication History
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Abstract

Over the past 50 years, design of hardware has evolved from transistor level to register transfer level (RTL), and now to transaction level. Transaction Level Modeling (TLM) enhances simulation performance of today's complex digital systems and also provides the ability of early design space exploration. TLM divides a system into computation parts, i.e. processing elements, and communication parts, i.e. channels and sockets. The inherent concurrency of Ada along with its object oriented features gives it potentials for being used as a TLM language.

In this paper, we use a specialized form of Ada as a system description language, like the way SystemC is used for description of systems. We refer to our form of Ada as SystemAda and we use a public Ada compiler (Gnat) to evaluate system descriptions written in Ada. SystemAda is meant for modeling system behavior and structure at the transaction level and we consider possible approaches for extending Ada to meet these requirements. This paper discusses the specification of our proposed SystemAda, its hardware description style, its RTL link, and description of a TLM 1.0 channel using SystemAda.

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  • Published in

    cover image ACM SIGAda Ada Letters
    ACM SIGAda Ada Letters  Volume 31, Issue 2
    August 2011
    62 pages
    ISSN:1094-3641
    DOI:10.1145/2148436
    Issue’s Table of Contents

    Copyright © 2012 Copyright is held by the owner/author(s)

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    Association for Computing Machinery

    New York, NY, United States

    Publication History

    • Published: 22 February 2012

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