Abstract
Phase analysis, which classifies the set of execution intervals with similar execution behavior and resource requirements, has been widely used in a variety of dynamic systems, including dynamic cache reconfiguration, prefetching and race detection. While phase granularity has been a major factor to the accuracy of phase prediction, it has not been well investigated yet and most dynamic systems usually adopt a fine-grained prediction scheme. However, such a scheme can only take account of recent local phase information and could be frequently interfered by temporary noises due to instant phase changes, which might notably limit the prediction accuracy.
In this paper, we make the first investigation on the potential of multi-level phase analysis (MLPA), where different granularity phase analysis are combined together to improve the overall accuracy. The key observation is that a coarse-grained interval, which usually consists of stably-distributed fine-grained intervals, can be accurately identified based on the fine-grained intervals at the beginning of its execution. Based on the observation, we design and implement a MLPA scheme. In such a scheme, a coarse-grained phase is first identified based on the fine-grained intervals at the beginning of its execution. The following fine-grained phases in it are then predicted based on the sequence of fine-grained phases in the coarse-grained phase. Experimental results show such a scheme can notably improve the prediction accuracy. Using Markov fine-grained phase predictor as the baseline, MLPA can improve prediction accuracy by 20%, 39% and 29% for next phase, phase change and phase length prediction for SPEC2000 accordingly, yet incur only about 2% time overhead and 40% space overhead (about 360 bytes in total).
To demonstrate the effectiveness of MLPA, we apply it to a dynamic cache reconfiguration system which dynamically adjusts the cache size to reduce the power consumption and access time of data cache. Experimental results show that MLPA can further reduce the average cache size by 15% compared to the fine-grained scheme.
- R. Balasubramonian, D. H. Albonesi, A. Buyuktosunoglu, and S. Dwarkadas. Memory hierarchy reconfiguration for energy and performance in general-purpose processor architectures. In Proceedings of the IEEE/ACM International Symposium on Microarchitecture, pages 245--257, 2000. Google Scholar
Digital Library
- I.-C. K. Chen, J. T. Coffey, and T. N. Mudge. Analysis of branch prediction via data compression. In Proceedings of the international conference on Architectural support for programming languages and operating systems, pages 128--137, 1996. Google Scholar
Digital Library
- C.-B. Cho and T. Li. Complexity-based program phase analysis and classification. In Proceedings of the international conference on Parallel architectures and compilation techniques, 2006. Google Scholar
Digital Library
- P. J. Denning and S. C. Schwartz. Properties of the working-set model. Communications of the ACM, 15(3):191--198, 1972. Google Scholar
Digital Library
- A. S. Dhodapkar and J. E. Smith. Managing multi-configuration hardware via dynamic working set analysis. In Proceedings of the International Symposium on Computer Architecture, pages 233--244, 2002. Google Scholar
Digital Library
- A. S. Dhodapkar and J. E. Smith. Comparing program phase detection techniques. In Proceedings of the IEEE/ACM International Symposium on Microarchitecture, 2003. Google Scholar
Digital Library
- E. Duesterwald, C. Cascaval, and S. Dwarkadas. Characterizing and predicting program behavior and its variability. In Proceedings of the international conference on Parallel architectures and compilation techniques, page 220, 2003. Google Scholar
Digital Library
- A. Georges, D. Buytaert, L. Eeckhout, and K. D. Bosschere. Method-level phase behavior in java workloads. In Proceedings of the 19th annual ACM SIGPLAN conference on Object-oriented programming, systems, languages, and applications, pages 270--287, 2004. Google Scholar
Digital Library
- M. J. Hind, V. T. Rajan, and P. F. Sweeney. Phase shift detection: A problem classification. Technical report, IBM, 2003.Google Scholar
- M. Huang, J. Renau, and J. Torrellas. Positional Adaptation of Processors: Application to Energy Reduction. In Proceedings of the International Symposium on Computer Architecture, 2003. Google Scholar
Digital Library
- T. Huffmire and T. Sherwood. Wavelet-based phase classification. In Proceedings of the international conference on Parallel architectures and compilation techniques, pages 95--104, 2006. Google Scholar
Digital Library
- C. Isci and M. Martonosi. Runtime power monitoring in high-end processors: Methodology and empirical data. In Proceedings of the IEEE/ACM International Symposium on Microarchitecture, 2003. Google Scholar
Digital Library
- C. Isci and M. Martonosi. Phase characterization for power: evaluating control-flow-based and event-counter-based techniques. In Proceedings of the IEEE International Symposium on High Performance Computer Architecture, pages 133--144, 2006.Google Scholar
Cross Ref
- D. Joseph and D. Grunwald. Prefetching using markov predictors. In Proceedings of the International Symposium on Computer Architecture, 1997. Google Scholar
Digital Library
- J. Lau, S. Schoenmackers, and B. Calder. Structures for phase classification. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, 2004. Google Scholar
Digital Library
- J. Lau, E. Perelman, G. Hamerly, T. Sherwood, and B. Calder. Motivation for variable length intervals and hierarchical phase behavior. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, pages 135--146, 2005. Google Scholar
Digital Library
- J. Lau, S. Schoenmackers, and B. Calder. Transition phase classification and prediction. In Proceedings of the IEEE International Symposium on High Performance Computer Architecture, 2005. Google Scholar
Digital Library
- J. Lau, E. Perelman, and B. Calder. Selecting software phase markers with code structure analysis. In Proceedings of the International Symposium on Code Generation and Optimization, pages 135--146, 2006. Google Scholar
Digital Library
- J. Lu, H. Chen, R. Fu, W.-C. Hsu, B. Othmer, P.-C. Yew, and D.-Y. Chen. The performance of runtime data cache prefetching in a dynamic optimization system. In Proceedings of the IEEE/ACM International Symposium on Microarchitecture, pages 180--190, 2003. Google Scholar
Digital Library
- D. Marino, M. Musuvathi, and S. Narayanasamy. Literace: effective sampling for lightweight data-race detection. In Proceedings of the ACM SIGPLAN conference on Programming language design and implementation, pages 134--143, 2009. Google Scholar
Digital Library
- A. A. Nair and L. Joh. Simulation points for spec 2006. In IEEE International Conference on Computer Design, pages 38--46, 2008.Google Scholar
Cross Ref
- E. Perelman, G. Hamerly, and B. Calder. Picking statistically valid and early simulation points. In Proceedings of the international conference on Parallel architectures and compilation techniques, 2003. Google Scholar
Digital Library
- A. Phansalkar, A. Joshi, L. Eeckhout, and L. John. Measuring program similarity: Experiments with spec cpu benchmark suites. In Proceedings of the IEEE International Symposium on Performance Analysis of Systems and Software, pages 10--20, 2005. Google Scholar
Digital Library
- X. Shen, Y. Zhong, and C. Ding. Locality phase prediction. In Proceedings of the international conference on Architectural support for programming languages and operating systems, pages 165--176, 2004. Google Scholar
Digital Library
- T. Sherwood, E. Perelman, G. Hamerly, and B. Calder. Automatically characterizing large scale program behavior. In Proceedings of the international conference on Architectural support for programming languages and operating systems, 2002. Google Scholar
Digital Library
- T. Sherwood, S. Sair, and B. Calder. Phase tracking and prediction. In Proceedings of the International Symposium on Computer Architecture, pages 336--349, 2003. Google Scholar
Digital Library
Index Terms
Improving dynamic prediction accuracy through multi-level phase analysis
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