ABSTRACT
We present the CASM language, an abstract state machine (ASM) based modeling language originally designed for verifying compiler backends. We demonstrate the expressiveness by describing an instruction set simulator (ISS) for MIPS in approximately 700 lines of code. Further we present a refinement of the models to cycle-accurately describe two implementations of the classic 5-stage MIPS pipeline. Utilizing symbolic execution allows us to prove semantic equivalence of the pipeline implementations and the instruction set description. Finally we compile the models to C++ and provide a small runtime to create a system simulator achieving a performance of approx. 1 MHz in MiBench and SPECInt2000 benchmarks.
References
- D. August, J. Chang, S. Girbal, D. Gracia-Perez, G. Mouchard, D. A. Penry, O. Temam, and N. Vachharajani. UNISIM: An open simulation environment and library for complex architecture design and collaborative development. IEEE Computer Architecture Letters, 6(2): 45--48, 2007. Google Scholar
Digital Library
- R. Azevedo, S. Rigo, M. Bartholomeu, G. Araujo, C. Araujo, and E. Barros. The ArchC architecture description language and tools. Int. J. Parallel Program., 33(5): 453--484, 2005. Google Scholar
Digital Library
- J. Bergin and S. Greenfield. Teaching parameter passing by example using thunks in C and C++. SIGCSE Bull., 25(1): 10--14, Mar. 1993. Google Scholar
Digital Library
- F. Blanqui, C. Helmstetter, V. Joloboff, J.-F. Monin, and X. Shi. Designing a CPU model: from a pseudo-formal document to fast code. CoRR, abs/1109.4351, 2011.Google Scholar
- E. Börger and J. Schmid. Composition and submachine concepts for sequential ASMs. In Computer Science Logic (Proceedings of CSL 2000), volume 1862 of LNCS, pages 41--60. Springer-Verlag, 2000. Google Scholar
Digital Library
- F. Brandner, A. Fellnhofer, A. Krall, and D. Riegler. Fast and accurate simulation using the LLVM compiler framework. In RAPIDO '09: 1st Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools, 2009.Google Scholar
- F. Brandner, N. Horspool, and A. Krall. DSP instruction set simulation. In S. S. Bhattacharyya, E. Deprettere, R. Leupers, and J. Takala, editors, Handbook of Signal Processing Systems, pages 679--705. Springer, Aug. 2010.Google Scholar
Cross Ref
- E. Börger. Abstract state machines: A method for high-level system design and analysis, 2003. Google Scholar
Digital Library
- H. Cassé, J. Barre, R. Vaillant-David, and P. Sainrat. Fast Instruction-Accurate Simulation with SimNML (regular paper). In Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), Heraklion, Crète, Grèce, 22/01/11, pages 8--12, http://univ-lille1.fr, janvier 2011. Université de Lille.Google Scholar
- R. Farahbod, V. Gervasi, and U. Glässer. CoreASM: An extensible ASM execution engine. In Proc. of the 12th International Workshop on Abstract State Machines, pages 153--165, 2005.Google Scholar
- G. Goos and W. Zimmermann. Verifying compilers and ASMs. In Proceedings of the International Workshop on Abstract State Machines, Theory and Applications, ASM '00, pages 177--202, London, UK, 2000. Springer-Verlag. Google Scholar
Digital Library
- Y. Gurevich. Evolving algebras 1993: Lipari guide, pages 9--36. Oxford University Press, Inc., New York, NY, USA, 1995. Google Scholar
Digital Library
- M. R. Guthaus, J. S. Ringenberg, D. Ernst, T. M. Austin, T. Mudge, and R. B. Brown. Mibench: A free, commercially representative embedded benchmark suite. In Proceedings of the Workload Characterization, 2001. WWC-4. 2001 IEEE International Workshop, WWC '01, pages 3--14, Washington, DC, USA, 2001. IEEE Computer Society. Google Scholar
Digital Library
- J. C. King. Symbolic execution and program testing. Commun. ACM, 19(7): 385--394, July 1976. Google Scholar
Digital Library
- R. Lezuo and A. Krall. A unified processor model for compiler verification and simulation using asm. In ABZ, pages 327--330, 2012. Google Scholar
Digital Library
- A. Nohl, G. Braun, O. Schliebusch, R. Leupers, H. Meyr, and A. Hoffmann. A universal technique for fast and flexible instruction-set architecture simulation, 2002. Google Scholar
Digital Library
- D. A. Patterson and J. L. Hennessy. Computer Organization and Design - The Hardware / Software Interface (Revised 4th Edition). The Morgan Kaufmann Series in Computer Architecture and Design. Academic Press, 2012. Google Scholar
Digital Library
- V. Rajesh and R. Moona. Processor modeling for hardware software codesign. In in Int. Conf. on VLSI Design, pages 132--137, 2000. Google Scholar
Digital Library
- A. Riazanov and A. Voronkov. The design and implementation of VAMPIRE. AI Commun., 15: 91--110, Aug. 2002. Google Scholar
Digital Library
- R. G. Sargent. Verification and validation of simulation models. In Winter Simulation Conference, WSC '09, pages 162--176. Winter Simulation Conference, 2009. Google Scholar
Digital Library
- G. Sutcliffe, S. Schulz, K. Claessen, and A. Van Gelder. Using the TPTP language for writing derivations and finite interpretations. In Proceedings of the Third international joint conference on Automated Reasoning, IJCAR'06, pages 67--81, Berlin, Heidelberg, 2006. Springer-Verlag. Google Scholar
Digital Library
- Open SystemC Initiative. http://www.systemc.org/home.Google Scholar
- J. Teich, P. W. Kutter, and R. Weper. Description and simulation of microprocessor instruction sets using ASMs. In Proceedings of the International Workshop on Abstract State Machines, Theory and Applications, ASM '00, pages 266--286, London, UK, 2000. Springer-Verlag. Google Scholar
Digital Library
- J. J. Yi and D. J. Lilja. Simulation of computer architectures: Simulators, benchmarks, methodologies, and recommendations. IEEE Trans. Computers, 55(3): 268--280, 2006. Google Scholar
Digital Library
Index Terms
Using the CASM language for simulator synthesis and model verification






Comments