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Sensitivity of cache replacement policies

Published:21 March 2013Publication History
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Abstract

The sensitivity of a cache replacement policy expresses to what extent the execution history may influence the number of cache hits and misses during program execution. We present an algorithm to compute the sensitivity of a replacement policy. We have implemented this algorithm in a tool called Relacs that can handle a large class of replacement policies including LRU, FIFO, PLRU, and MRU. Sensitivity properties obtained with Relacs demonstrate that the execution history can have a strong impact on the number of cache hits and misses if FIFO, PLRU, or MRU is used. A simple model of execution time is used to evaluate the impact of cache sensitivity on measured execution times. The model shows that measured execution times may strongly underestimate the worst-case execution time for FIFO, PLRU, and MRU.

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          cover image ACM Transactions on Embedded Computing Systems
          ACM Transactions on Embedded Computing Systems  Volume 12, Issue 1s
          Special section on ESTIMedia'12, LCTES'11, rigorous embedded systems design, and multiprocessor system-on-chip for cyber-physical systems
          March 2013
          701 pages
          ISSN:1539-9087
          EISSN:1558-3465
          DOI:10.1145/2435227
          Issue’s Table of Contents

          Copyright © 2013 ACM

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          Publication History

          • Published: 21 March 2013
          • Accepted: 1 April 2012
          • Revised: 1 November 2011
          • Received: 1 June 2011
          Published in tecs Volume 12, Issue 1s

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