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Adaptive wear-leveling algorithm for PRAM main memory with a DRAM buffer

Published:10 March 2014Publication History
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Abstract

Phase Change RAM (PRAM) is a candidate to replace DRAM main memory due to its low idle power consumption and high scalability. However, its latency and endurance have generated problems in fulfilling its main memory role. The latency can be treated with a DRAM buffer, but the endurance problem remains, with three critical points that need to be improved despite the use of, existing wear-leveling algorithms. First, existing DRAM buffering schemes do not consider write count distribution. Second, swapping and shifting operations are performed statically. Finally, swapping and shifting operations are loosely coupled with a DRAM buffer. As a remedy to these drawbacks, we propose an adaptive wear-leveling algorithm that consists of three novel schemes for PRAM main memory with a DRAM buffer. The PRAM-aware DRAM buffering scheme reduces the write count and prevents skewed writing by considering the write count and clean data based on the least recently used (LRU) scheme. The adaptive multiple swapping and shifting scheme makes the write count even with the dynamic operation timing, the number of swapping pages being based on the workload pattern. Our DRAM buffer-aware swapping and shifting scheme reduces overhead by curbing additional swapping and shifting operations, thus reducing unnecessary write operations. To evaluate the wear-leveling effect, we have implemented a PIN-based wear-leveling simulator. The evaluation confirms that the PRAM lifetime increases from 0.68 years with the previous wear-leveling algorithm to 5.32 years with the adaptive wear-leveling algorithm.

References

  1. Y.-H. Chang, J.-W. Hsieh, and T.-W. Kuo. 2010. Improving flash wear-leveling by proactively moving static data. IEEE Trans. Comput. 59, 1, 53--65. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. S. Cho and H. Lee. 2009. Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 42). 347--357. Google ScholarGoogle ScholarDigital LibraryDigital Library
  3. V. Delaluz, A. Sivasubramaniam, M. T. Kandemir, N. Vijaykrishnan, and M. J. Irwin. 2002. Scheduler-based DRAM energy management. In Proceedings of the Design Automation Conference (DAC). 697--702. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. G. Dhiman, R. Ayoub, and T. Rosing. 2009. PDRAM: A hybrid PRAM and DRAM main memory system. In Proceedings of the 46th Annual Design Automation Conference (DAC). 664--469. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. J. Dong, L. Zhang, Y. Han, Y. Wang, and X. Li. 2011. Wear rate leveling: Lifetime enhancement of PRAM with endurance variation. In Proceedings of the Design Automation Conference (DAC). 972--977. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. A. P. Ferreira, M. Zhou, S. Bock, B. Childers, R. Melhem, and D. Mossé. 2010. Increasing PCM main memory lifetime. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE). 914--919. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. J. Guo, J. Yang, Y. Zhang, and Y. Chen. 2013. Low cost power failure protection for MLC NAND flash storage systems with PRAM/DRAM hybrid buffer. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE). 859--864. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. E. Ipek, J. Condit, E. B. Nightingale, D. Burger, and T. Moscibroda. 2010. Dynamically replicated memory: Building reliable systems from nanoscale resistive memories. In Proceedings of the 15th Edition of ASPLOS on Architectural Support For Programming Languages and Operating Systems (ASPLOS). Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. H. Jo, J.-U. Kang, S.-Y. Park, J.-S. Kim, and J. Lee. 2006. FAB: Flash-aware buffer management policy for portable media players. IEEE Trans. Consum. Electron. 52, 2, 485--493. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. J. Kong and H. Zhou. 2010. Improving privacy and lifetime of PCM-based main memory. In Proceedings of IEEE DSN. 333--342.Google ScholarGoogle Scholar
  11. B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. 2009. Architecting phase change memory as a scalable DRAM alternative. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA). 2--13. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. S. Lee, D. Shin, and J. Kim. 2008. Buffer-aware garbage collection for NAND flash memory-based storage systems. In Proceedings of the International Workshop on Software Support for Portable Storage (IWSSPS).Google ScholarGoogle Scholar
  13. C.-K. Luk, R. Cohn, R. Muth, H. Patil, A. Klauser, G. Lowney, S. Wallace, V. J. Reddi, and K. Hazelwood. 2005. PIN: Building customized program analysis tools with dynamic instrumentation. In Proceedings of the ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI). 190--200. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. Y. Ou, T. Härder, and P. Jin. 2009. CFDC: A flash-aware replacement policy for database buffer management. In Proceedings of the Fifth International Workshop on Data Management on New Hardware (DaMoN). 15--20. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. H. Park, S. Yoo, and S. Lee. 2011a. Power management of hybrid DRAM/PRAM-based main memory. In Proceedings of the 48th Design Automation Conference (DAC). 59--64. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. S. K. Park, H. Seok, D.-J. Shin, and K. H. Park. 2012. PRAM wear-leveling algorithm for hybrid main memory based on data buffering, swapping, and shifting. In Proceedings of the 27th Annual ACM Symposium on Applied Computing (SAC). 1643--1644. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. S.-Y. Park, D. Jung, J.-U. Kang, J.-S. Ki M, and J. Lee. 2006. CFLRU: A replacement algorithm for flash memory. In Proceedings of the International Conference on Compilers, Architecture, and Synthesis for Embedded Systems (CASES). 234--241. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. Y. Park, S.-H. Lim, C. Lee, and K. H. Park. 2008. PFFS: A scalable flash memory file system for the hybrid architecture of phase-change RAM and NAND flash. In Proceedings of the ACM Symposium on Applied Computing (SAC). 1498--1503. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. Y. Park, S. K. Park, and K. H. Park. 2010. Linux kernel support to exploit phase change memory. In Proceedings of the 12th Annual Linux Symposium (LS).Google ScholarGoogle Scholar
  20. Y. Park, D.-J. Shin, S. K. Park, and K. H. Park. 2011b. Power-aware memory management for hybrid main memory. In Proceedings of the 2nd International Conference on Next Generation Information Technology (ICNIT). 82--85.Google ScholarGoogle Scholar
  21. M. K. Qureshi, M. Franceschini, and L. A. Lastras-Montano. 2010. Improving read performance of phase change memories via write cancellation and write pausing. In Proceedings of IEEE HPCA. 1--11.Google ScholarGoogle Scholar
  22. M. K. Qureshi, J. Karidis, M. Franceschini, V. Srinivasan, L. Lastras, and B. Abali. 2009a. Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO). 14--23. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. M. K. Qureshi, V. Srinivasan, and J. A. Rivers. 2009b. Scalable high performance main memory system using phase-change memory technology. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA). 24--33. Google ScholarGoogle ScholarDigital LibraryDigital Library
  24. L. E. Ramos, E. Gorbatov, and R. Bianchini. 2011. Page placement in hybrid memory systems. In Proceedings of the International Conference on Supercomputing (ICS). 85--95. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. D. Roberts, T. Kgil, and T. Mudge. 2009. Using non-volatile memory to save energy in servers. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE). 743--748. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. A. Seznec. 2010. A phase change memory as a secure main memory. Comput. Arch. Lett. 9, 1, 5--8. Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. B. Wongchaowart, M. Iskander, and S. Cho. 2010. A content-aware block placement algorithm for reducing PRAM storage bit writes. In Proceedings of IEEE 26th Symposium on Mass Storage Systems and Technologies (MSST). 1--11. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. B.-D. Yang, J.-E. Lee, J.-S. Kim, J. Cho, S.-Y. Lee, and B.-G. Yu. 2007. A low power phase-change random access memory using a data-comparison write scheme. In Proceedings of IEEE ISCAS. 3014--3017.Google ScholarGoogle ScholarCross RefCross Ref
  29. N. Ye, Q. Chen, and C. M. Borror. 2004. EWMA forecast of normal system activity for computer intrusion detection. IEEE Trans. Rel. 53, 4, 557--566.Google ScholarGoogle ScholarCross RefCross Ref
  30. W. Zhang and T. Li. 2009. Characterizing and mitigating the impact of process variations on phase change based memory systems. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 42). 2--13. Google ScholarGoogle ScholarDigital LibraryDigital Library
  31. P. Zhou, B. Zhao, J. Yang, and Y. Zhang. 2009. A durable and energy effcient main memory using phase change memory technology. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA). 14--23. Google ScholarGoogle ScholarDigital LibraryDigital Library

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