Abstract
We demonstrate circuits that generate set and integer partitions on a set S of n objects at a rate of one per clock. Partitions are ways to group elements of a set together and have been extensively studied by researchers in algorithm design and theory. We offer two versions of a hardware set partition generator. In the first, partitions are produced in lexicographical order in response to successive clock pulses. In the second, an index input determines the set partition produced. Such circuits are useful in the hardware implementation of the optimum distribution of tasks to processors. We show circuits for integer partitions as well. Our circuits are combinational. For large n, they can have a large delay. However, one can easily pipeline them to produce one partition per clock period. We show (1) analytical and (2) experimental time/complexity results that quantify the efficiency of our designs. For example, our results show that a hardware set partition generator running on a 100MHz FPGA produces partitions at a rate that is approximately 10 times the rate of a software implementation on a processor running at 2.26GHz.
- Daniel Berend and Tamir Tassa. 2010. Improved bounds on Bell numbers and on moments of sums of random variables. Probability and Mathematical Statistics, 30, 185--205.Google Scholar
- Mireille Bousquet-Mélou and Kimmo Eriksson. 1997a. Lecture hall partitions (1). Ramanujan Journal, 1, 101--111.Google Scholar
Cross Ref
- Mireille Bousquet-Mélou and Kimmo Eriksson. 1997b. Lecture hall partitions (2). Ramanujan Journal, 1, 165--185.Google Scholar
Cross Ref
- Randall E. Bryant. 1986. Graph-based algorithms for Boolean function manipulation. IEEE Transactions on Computers, C-35, 677--691. Google Scholar
Digital Library
- Jon T. Butler and Tsutomu Sasao. 2011. High-speed constant weight code generators. In Proceedings of the 7th International Symposium on Applied Reconfigurable Computing (ARC’11), Lecture Notes in Computer Science (LNCS 6576), A. Koch et al. (Eds.). Springer-Verlag, Berlin, 193--204.Google Scholar
- Jon T. Butler and Tsutomu Sasao. 2012. Hardware index to permutation converter. In Proceedings of the 26th IEEE International Parallel and Distributed Processing Symposium. 424--429. Google Scholar
Digital Library
- Jon T. Butler and Tsutomu Sasao. 2013a. Combinatorial computing - One object per clock. In Proceedings of the 2013 Reed-Muller Workshop. Toyama, Japan, 66--74.Google Scholar
- Jon T. Butler and Tsutomu Sasao. 2013b. Hardware index to set partition converter. In 9th International Workshop on Applied Reconfigurable Computing (ARC2013), Proceedings Lecture Notes in Computer Science (LNCS 7806). Springer-Verlag, Los Angeles, CA, 72--83. Google Scholar
Digital Library
- Xin Chen, Lan Liu, Zheng Liu, and Tao Jiang. 2008. On the minimum common integer partition problem. In ACM Transactions on Computational Logic, V, 1--9. Google Scholar
Digital Library
- R. William Gosper. 1972. Item 175 in Beeler, M., Gosper, R. W., and Schroeppel, R., “HAKMEM.” Cambridge, MA: MIT Artificial Intelligence Laboratory. http://www.inwap.com/pdp10/hbaker/hakmem/hacks.html#item175 Memo AIM-239.Google Scholar
- Robin K. S. Hankin and Luke J. West. 2007. Set partitions in R. Journal of Statistical Software, 23, 99--100.Google Scholar
Cross Ref
- Shin-Ichiro Kawano and Shin-Ichi Nakano. 2005. Constant time generation of set partitions. IEICE Trans. Fundamentals, E88-A, 930--934. Google Scholar
Digital Library
- Dominque Lavenier and Yannick Saouter. 1998. Computing Goldbach partitions using pseudo-random bit generator operators on an FPGA systolic array. In Proceedings of the 8th International Workshop on Field Programmable Languages FPL’98, Proceedings Lecture Notes in Computer Science (LNCS 1482), R. W. Hartenstein and A. Keevallik (Eds.). Tallinn, Estonia, 316--325. Google Scholar
Digital Library
- Rung-Bin Lin. 2006. On the applications of partition diagrams for integer pertitioning. In Proceedings of the 23rd Workshop on Combinatorial Mathematics and Computation Theory, Vol. 7. Chang-Hua, Taiwan, 349--362.Google Scholar
- John K. S. McKay. 1965. Algorithm 263, partition generator. Communications of the ACM, 8, 493. Google Scholar
Digital Library
- Shinobu Nagayama, Tsutomu Sasao, and Jon T. Butler. 2012. Analysis of multi-state systems with multi-state components using EVBDDs. In Proceedings of the 42nd International Symposium on Multiple-Valued Logic. Victoria, Canada, 122--127. Google Scholar
Digital Library
- B. John Oommen and David T. H. Ng. 1990. On generating random partitions with arbitrary distributions. The Computer Journal, 33, 368--374. Google Scholar
Digital Library
- Michael Orlov. 2002. Efficient generation of set partitions. Technical Report. Retrieved from https://www.cs.bgu.ac.il/∼orlovm/papers/partitions.pdf, 1--6.Google Scholar
- Edward M. Reingold, Jurg Nivergelt, and Narsingh Deo. 1977. Combinatorial Algorithms, Theory and Practice. Prentice-Hall. Google Scholar
Digital Library
- Ichiro Semba. 1984. An efficient algorithm for generating all partitions of the set {1, 2, ..., n}. Journal of Information Processing, 7, 424--436.Google Scholar
- Jennifer L. Shafer, Stuart Schneider, Jon T. Butler, and Pantelimon Stănică. 2010. Enumeration of bent Boolean functions by reconfigurable computer. In Proceedings of the 18th Annual International IEEE Symposium on Field-Programmable Custom Computing Machines. 265--272. Google Scholar
Digital Library
- Ivan Stojmenovič. 1990. An optimal algorithm for generating equivalence relations on a linear array of processors. BIT, 30, 424--436. Google Scholar
Digital Library
- Terasic. 2011. High Speed FPGA-based Bio-computing Platform: FPGA Development Kits an Ideal Platform for Intensive Gene and Protein Calculations. Retrieved from http://www.terasic.com.tw/cgi-bin/page/archive.pl?Language=English&No=613.Google Scholar
- Herbert S. Wilf. 2000. Lectures on Integer Partitions. Retrieved from http://www.math.upenn.edu/wilf/PIMS/PIMSLectures.pdf.Google Scholar
- David P. Woodruff. 2006. Better approximations for the minimum common integer partition problem. In Approximations, Randomizations, and Combinatorial Optimizations: Algorithms and Techniques, J. Diaz et al. (Eds.). Springer-Verlag, Berlin, 248--259. Google Scholar
Digital Library
- Antoine Zoghbi and Ivan Stojmenovič. 1998. Fast algorithms for generating integer partitions. International Journal on Computer Mathematics 70, 319--332.Google Scholar
Cross Ref
Index Terms
High-Speed Hardware Partition Generation
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