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STAMPS: a state-machine based processor simulator

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Published:01 March 1997Publication History
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Abstract

This paper describes the STAMPS software workbench that supports Honours level computer architecture teaching. STAMPS was developed in response to a need perceived from experience of such teaching. It is a hierarchically structured CPU simulator that can be customised to any architecture and implementation of that architecture.STAMPS is written as a Tcl/wish application. Tcl facilitates interaction with the file system, simple naming conventions and highly flexible user interaction. STAMPS runs on any Unix platform.

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            • Published in

              cover image ACM SIGCSE Bulletin
              ACM SIGCSE Bulletin  Volume 29, Issue 1
              March 1997
              388 pages
              ISSN:0097-8418
              DOI:10.1145/268085
              Issue’s Table of Contents
              • cover image ACM Conferences
                SIGCSE '97: Proceedings of the twenty-eighth SIGCSE technical symposium on Computer science education
                March 1997
                410 pages
                ISBN:0897918894
                DOI:10.1145/268084

              Copyright © 1997 ACM

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              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 1 March 1997

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