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Extracting logical structure and identifying stragglers in parallel execution traces

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Published:06 February 2014Publication History
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Abstract

We introduce a new approach to automatically extract an idealized logical structure from a parallel execution trace. We use this structure to define intuitive metrics such as the lateness of a process involved in a parallel execution. By analyzing and illustrating traces in terms of logical steps, we leverage a developer's understanding of the happened-before relations in a parallel program. This technique can uncover dependency chains, elucidate communication patterns, and highlight sources and propagation of delays, all of which may be obscured in a traditional trace visualization.

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  1. Extracting logical structure and identifying stragglers in parallel execution traces

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    • Published in

      cover image ACM SIGPLAN Notices
      ACM SIGPLAN Notices  Volume 49, Issue 8
      PPoPP '14
      August 2014
      390 pages
      ISSN:0362-1340
      EISSN:1558-1160
      DOI:10.1145/2692916
      Issue’s Table of Contents
      • cover image ACM Conferences
        PPoPP '14: Proceedings of the 19th ACM SIGPLAN symposium on Principles and practice of parallel programming
        February 2014
        412 pages
        ISBN:9781450326568
        DOI:10.1145/2555243

      Copyright © 2014 Owner/Author

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      Association for Computing Machinery

      New York, NY, United States

      Publication History

      • Published: 6 February 2014

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