Abstract
Non-volatile memories such as phase change memory (PCM) and memristor are being actively studied as an alternative to DRAM-based main memory in embedded systems because of their properties, which include low power consumption and high density. Though PCM is one of the most promising candidates with commercial products available, its adoption has been greatly compromised by limited write endurance. As main memory is one of the most heavily accessed components, it is critical to prolong the lifetime of PCM.
In this article, we present write-activity-aware page table management (WAPTM), a simple yet effective page table management scheme for reducing unnecessary writes, by redesigning system software and exploiting write-activity-aware features provided by the hardware. We implemented WAPTM in Google Android based on the ARM architecture and evaluated it with real Android applications. Experimental results show that WAPTM can significantly reduce writes in page tables, proving the feasibility and potential of prolonging the lifetime of PCM-based main memory through reducing writes at the OS level.
- Sean Eron Anderson. 2005. Bit Twiddling Hacks. Retrieved December 12, 2004 from http://graphics.stanford.edu/seander/bithacks.html.Google Scholar
- ARM Limited. 2005. ARM architecture reference manual.Google Scholar
- Daniel Bartholomew. 2006. QEMU: A multihost, multitarget emulator. Linux Journal 2006, 145. Google Scholar
Digital Library
- Luis Angel D. Bathen, Mark Gottscho, Nikil Dutt, Alex Nicolau, and Puneet Gupta. 2012. ViPZonE: OS-level memory variability-driven physical address zoning for energy savings. In Proceedings of the 8th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'12). ACM, New York, NY, 33--42. Google Scholar
Digital Library
- F. Bedeschi, R. Fackenthal, C. Resta, E. M. Donze, M. Jagasivamani, E. C. Buda, F. Pellizzer, D. W. Chow, A. Cabrini, G. Calvi, R. Faravelli, A. Fantini, G. Torelli, D. Mills, R. Gastaldi, and G. Casagrande. 2009. A bipolar-selected phase change memory featuring multi-level cell storage. IEEE Journal of Solid-State Circuits 44, 1, 217--227.Google Scholar
Cross Ref
- Daniel Bovet and Marco Cesati. 2006. Understanding the Linux Kernel (3rd ed.). O'Reilly & Associates, Inc., Sebastopol, CA. Google Scholar
Digital Library
- Geoffrey W. Burr, Matthew J. Breitwisch, Michele Franceschini, Davide Garetto, Kailash Gopalakrishnan, Bryan Jackson, Bulent Kurdi, Chung Lam, Luis A. Lastras, Alvaro Padilla, Bipin Rajendran, Simone Raoux, and Rohit S. Shenoy. 2010. Phase change memory technology. Journal of Vacuum Science Technology B: Microelectronics and Nanometer Structures 28, 2, 223--262.Google Scholar
Cross Ref
- Yiran Chen, Hai Li, and Xiaobin Wang. 2010. Spintronic devices: From memory to memristor. In Proceedings of the 2010 International Conference on Communications, Circuits and Systems (ICCCAS'10). 811--816.Google Scholar
- Sangyeun Cho and Hyunjin Lee. 2009. Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'42). ACM, New York, NY, 347--357. Google Scholar
Digital Library
- Gaurav Dhiman, Raid Ayoub, and Tajana Rosing. 2009. PDRAM: A hybrid PRAM and DRAM main memory system. In Proceedings of the 46th Annual Design Automation Conference (DAC'09). ACM, New York, NY, 664--469. Google Scholar
Digital Library
- Alexandre P. Ferreira, Miao Zhou, Santiago Bock, Bruce Childers, Rami Melhem, and Daniel Mossé. 2010. Increasing PCM main memory lifetime. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE'10). European Design and Automation Association, 3001 Leuven, Belgium, 914--919. Google Scholar
Digital Library
- Andrew Hay, Karin Strauss, Timothy Sherwood, Gabriel H. Loh, and Doug Burger. 2011. Preventing PCM banks from seizing too much power. In Proceedings of the 44th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-44'11). ACM, New York, NY, 186--195. Google Scholar
Digital Library
- Yenpo Ho, Garng M. Huang, and Peng Li. 2009. Nonvolatile memristor memory: Device characteristics and design implications. In Proceedings of the 2009 International Conference on Computer-Aided Design (ICCAD'09). ACM, New York, NY, 485--490. Google Scholar
Digital Library
- Jingtong Hu, C. J. Xue, Wei-Che Tseng, Qingfeng Zhuge, and E. H.-M. Sha. 2010. Minimizing write activities to non-volatile memory via scheduling and recomputation. In SASP'10. 101--106. Google Scholar
Digital Library
- Jingtong Hu, Chun Jason Xue, Qingfeng Zhuge, Wei-Che Tseng, and Edwin H.-M. Sha. 2013. Write activity reduction on non-volatile main memories for embedded chip multiprocessors. ACM Trans. Embed. Comput. Syst. 12, 3, Article 77, 27 pages. Google Scholar
Digital Library
- Intel Corporation. 2013. Intel 64 and IA-32 architectures software developer manuals.Google Scholar
- Lei Jiang, Youtao Zhang, and Jun Yang. 2011. Enhancing phase change memory lifetime through fine-grained current regulation and voltage upscaling. In 2011 International Symposium on Low Power Electronics and Design (ISLPED'11). 127--132. Google Scholar
Digital Library
- Lei Jiang, Youtao Zhang, and Jun Yang. 2012a. ER: Elastic RESET for low power and long endurance MLC based phase change memory. In Proceedings of the 2012 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'12). ACM, New York, NY, 39--44. Google Scholar
Digital Library
- Lei Jiang, Bo Zhao, Youtao Zhang, Jun Yang, and B. R. Childers. 2012b. Improving write operations in MLC phase change memory. In IEEE 18th International Symposium on High Performance Computer Architecture (HPCA'12). 1--10. Google Scholar
Digital Library
- Yongsoo Joo, Dimin Niu, Xiangyu Dong, Guangyu Sun, Naehyuck Chang, and Yuan Xie. 2010. Energy- and endurance-aware design of phase change memory caches. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE'10). European Design and Automation Association, Leuven, Belgium, 136--141. Google Scholar
Digital Library
- D.-H. Kang, J.-H. Lee, J. H. Kong, D. Ha, J. Yu, C. Y. Um, J. H. Park, F. Yeung, J. H. Kim, W. I. Park, Y. J. Jeon, M. K. Lee, Y. J. Song, J. H. Oh, G. T. Jeong, and H. S. Jeong. 2008. Two-bit cell operation in diode-switch phase change memory cells with 90nm technology. In Proceedings of the 2008 Symposium on VLSI Technology. 98--99.Google Scholar
- B. C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, E. Ipek, O. Mutlu, and D. Burger. 2010. Phase-change technology and the future of main memory. IEEE Micro 30, 1, 131--141. Google Scholar
Digital Library
- Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. 2009. Architecting phase change memory as a scalable dram alternative. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA'09). ACM, New York, NY, 2--13. Google Scholar
Digital Library
- Yong Li, Yiran Chen, and Alex K. Jones. 2012. A software approach for combating asymmetries of non-volatile memories. In Proceedings of the 2012 ACM/IEEE International Symposium on Low Power Electronics and Design (ISLPED'12). ACM, New York, NY, 191--196. Google Scholar
Digital Library
- Duo Liu, Tianzheng Wang, Yi Wang, Zhiwei Qin, and Zili Shao. 2011. PCM-FTL: A write-activity-aware NAND flash memory management scheme for PCM-based embedded systems. In Proceedings of the 2011 IEEE 32nd Real-Time Systems Symposium (RTSS'11). IEEE Computer Society, Washington, DC, 357--366. Google Scholar
Digital Library
- Duo Liu, Tianzheng Wang, Yi Wang, Zili Shao, Qingfeng Zhuge, and E. Sha. 2013. Curling-PCM: Application-specific wear leveling for phase change memory based embedded systems. In Proceedings of the 2013 18th Asia and South Pacific Design Automation Conference (ASP-DAC'13). 279--284.Google Scholar
- Robert Love. 2010. Linux Kernel Development (3rd ed.). Addison-Wesley Professional, New York, NY. Google Scholar
Digital Library
- Micron. 2012. Micron announces availability of phase change memory for mobile devices. Retrieved December 19, 2014 from http://investors.micron.com/releasedetail.cfm?ReleaseID=692563.Google Scholar
- Jeffrey C. Mogul, Eduardo Argollo, Mehul Shah, and Paolo Faraboschi. 2009. Operating system support for NVM+DRAM hybrid main memory. In Proceedings of the 12th Conference on Hot Topics in Operating Systems (HotOS'09). USENIX Association, Berkeley, CA, 14--14. Google Scholar
Digital Library
- Moinuddin K. Qureshi, John Karidis, Michele Franceschini, Vijayalakshmi Srinivasan, Luis Lastras, and Bulent Abali. 2009a. Enhancing lifetime and security of PCM-based main memory with start-gap wear leveling. In Proceedings of the 42nd Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'42). ACM, New York, NY, 14--23. Google Scholar
Digital Library
- Moinuddin K. Qureshi, Vijayalakshmi Srinivasan, and Jude A. Rivers. 2009b. Scalable high performance main memory system using phase-change memory technology. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA'09). ACM, New York, NY, 24--33. Google Scholar
Digital Library
- Abraham Silberschatz, Peter Baer Galvin, and Greg Gagne. 2008. Operating System Concepts (8th ed.). Wiley Publishing, New York, NY. Google Scholar
Digital Library
- L. C. Stancu, L. A. D. Bathen, N. Dutt, and A. Nicolau. 2012. AVid: Annotation driven video decoding for hybrid memories. In Proceedings of the IEEE 10th Symposium on Embedded Systems for Real-Time Multimedia (ESTIMedia'12). 2--11.Google Scholar
- Guangyu Sun, Yongsoo Joo, Yibo Chen, Dimin Niu, Yuan Xie, Yiran Chen, and Hai Li. 2010. A hybrid solid-state storage architecture for the performance, energy consumption, and lifetime improvement. In Proceedings of the 2010 IEEE 16th International Symposium on High Performance Computer Architecture (HPCA'10). 1--12.Google Scholar
Cross Ref
- Guangyu Sun, Dimin Niu, Jin Ouyang, and Yuan Xie. 2011. A frequent-value based PRAM memory architecture. In Proceedings of the 16th Asia and South Pacific Design Automation Conference (ASPDAC'11). IEEE Press, Piscataway, NJ, 211--216. Google Scholar
Digital Library
- Tianzheng Wang, Duo Liu, Zili Shao, and Chengmo Yang. 2012. Write-activity-aware page table management for PCM-based embedded systems. In Proceedings of the 2012 17th Asia and South Pacific Design Automation Conference (ASP-DAC'12). 317--322.Google Scholar
Cross Ref
- H.-S. P. Wong, S. Raoux, Sang Bum Kim, Jiale Liang, John P. Reifenberg, B. Rajendran, Mehdi Asheghi, and Kenneth E. Goodson. 2010. Phase change memory. Proc. IEEE 98, 12, 2201--2227.Google Scholar
Cross Ref
- Yuan Xie. 2011. Modeling, architecture, and applications for emerging memory technologies. IEEE Design Test of Computers 28, 1, 44--51. Google Scholar
Digital Library
- Chun Jason Xue, Youtao Zhang, Yiran Chen, Guangyu Sun, J. Jianhua Yang, and Hai Li. 2011. Emerging non-volatile memories: Opportunities and challenges. In Proceedings of the 7th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS'11). ACM, New York, NY, 325--334. Google Scholar
Digital Library
- Byung-Do Yang, Jae-Eun Lee, Jang-Su Kim, Junghyun Cho, Seung-Yun Lee, and Byoung-Gon Yu. 2007. A low power phase-change random access memory using a data-comparison write scheme. In Proceedings of the 2007 IEEE International Symposium on Circuits and Systems, ISCAS 2007. 3014--3017.Google Scholar
Cross Ref
- Ping Zhou, Bo Zhao, Jun Yang, and Youtao Zhang. 2009. A durable and energy efficient main memory using phase change memory technology. In Proceedings of the 36th Annual International Symposium on Computer Architecture (ISCA'09). ACM, New York, NY, 14--23. Google Scholar
Digital Library
Index Terms
Towards Write-Activity-Aware Page Table Management for Non-volatile Main Memories
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