skip to main content
research-article

Automating Elimination of Idle Functions by Runtime Reconfiguration

Published:11 May 2015Publication History
Skip Abstract Section

Abstract

A design approach is proposed to automatically identify and exploit runtime reconfiguration opportunities with optimised resource utilisation by eliminating idle functions. We introduce Reconfiguration Data Flow Graph, a hierarchical graph structure enabling reconfigurable designs to be synthesised in three steps: function analysis, configuration organisation, and runtime solution generation. The synthesised reconfigurable designs are dynamically evaluated and selected under various runtime conditions. Three applications—barrier option pricing, particle filter, and reverse time migration—are used in evaluating the proposed approach. The runtime solutions approximate their theoretical performance by eliminating idle functions and are 1.31 to 2.19 times faster than optimised static designs. FPGA designs developed with the proposed approach are up to 43.8 times faster than optimised CPU reference designs and 1.55 times faster than optimised GPU designs.

References

  1. Mauricio Araya-Polo, Javier Cabezas, Mauricio Hanzich, Miquel Pericas, Fulix Rubio, Isaac Gelado, Muhammad Shafiq, Enric Morancho, Nacho Navarro, Eduard Ayguade, Jose M. Cela, and Mateo Valero. 2011. Assessing accelerator-based HPC reverse time migration. IEEE Transactions on Parallel and Distributed Systems 22, 1, 147--162. Google ScholarGoogle ScholarDigital LibraryDigital Library
  2. Jurgen Becker, Michael Huebner, Gerhard Hettich, Rainer Constapel, Joachim Eisenmann, and Jurgen Luka. 2007. Dynamic and partial FPGA exploitation. In Proceedings of the IEEE 95, 2, 438--452.Google ScholarGoogle ScholarCross RefCross Ref
  3. Tobias Becker, Qiwei Jin, Wayne Luk, and Stephen Weston. 2011. Dynamic constant reconfiguration for explicit finite difference option pricing. In Proceedings of the 2011 International Conference on Reconfigurable Computing and FPGAs (ReConFig’11). 176--181. Google ScholarGoogle ScholarDigital LibraryDigital Library
  4. Karel Bruneel and Dirk Stroobandt. 2008. Automatic generation of run-time parameterizable configurations. In Proceedings of the International Conference on Field Programmable Logic and Applications (FPL’08). 361--366.Google ScholarGoogle ScholarCross RefCross Ref
  5. Eylon Caspi, Andre DeHon, and John Wawrzynek. 2001. A streaming multi-threaded model. In Proceedings of the 3rd Workshop on Media and Stream Processors. 21--28.Google ScholarGoogle Scholar
  6. Jason Cong, Karthik Gururaj, and Guoling Han. 2009. Synthesis of reconfigurable high-performance multicore systems. In Proceedings of the ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA’09). 201--208. Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. Wenyin Fu and Katherine Compton. 2005. An execution environment for reconfigurable computing. In Proceedings of the 13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’05). 149--158.Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. Wenyin Fu and Katherine Compton. 2008. Scheduling intervals for reconfigurable computing. In Proceedings of the 16th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’08). 87--96. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. Daniel D. Gajski, Nikil D. Dutt, Allen C.-H. Wu, and Steve Y.-L. Lin. 1992. High-Level Synthesis: Introduction to Chip and System Design. Kluwer Academic. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. Ruining He, Yuchun Ma, Kang Zhao, and Jinian Bian. 2012. ISBA: An independent set-based algorithm for automated partial reconfiguration module generation. In Proceedings of the 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD’12). 500--507. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. Rhett D. Hudson, David Lehn, Jason Hess, James Atwell, David Moye, Ken Shiring, and Peter Athanas. 1998. Spatiotemporal partitioning of computational structures onto configurable computing machines. In Proceedings of SPIE 3526, Configurable Computing: Technology and Applications. 62.Google ScholarGoogle ScholarCross RefCross Ref
  12. John C. Hull. 2005. Options, Futures and Other Derivatives (6th ed.). Prentice Hall.Google ScholarGoogle Scholar
  13. Qiwei Jin, Tobias Becker, Wayne Luk, and David B. Thomas. 2012. Optimising explicit finite difference option pricing for dynamic constant reconfiguration. In Proceedings of the 2012 22nd International Conference on Field Programmable Logic and Applications (FPL’12). 165--172.Google ScholarGoogle Scholar
  14. Meenakshi Kaul and Ranga Vemuri. 1998. Optimal temporal partitioning and synthesis for reconfigurable architectures. In Proceedings of Design, Automation, and Test in Europe (DATE’98). 389--396. Google ScholarGoogle ScholarDigital LibraryDigital Library
  15. Dirk Koch and Jim Torresen. 2011. FPGASort: A high performance sorting architecture exploiting run-time reconfiguration on FPGAs for large problem sorting. In Proceedings of the 19th ACM/SIGDA International Symposium on Field Programmable Gate Arrays (FPGA’11). 45--54. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. Hessam Kooti, Deepak Mishra, and Eli Bozorgzadeh. 2011. Reconfiguration-aware real-time scheduling under QoS constraint. In Proceedings of the 2011 16th Asia and South Pacific Design Automation Conference (ASP-DAC’11). 141--146. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. John W. Lockwood, Naji Naufel, Jonathan S. Turner, and David E. Taylor. 2001. Reprogrammable network packet processing on the field programmable port extender (FPX). In Proceedings of the 2001 ACM/SIGDA 9th International Symposium on Field Programmable Gate Arrays (FPGA’01). 87--93. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. Michael Montemerlo, Sebastian Thrun, and William Red Whittaker. 2002. Conditional particle filters for simultaneous mobile robot localization and people-tracking. In Proceedigs of the IEEE International Conference on Robotics and Automation (ICRA’02). 695--701.Google ScholarGoogle ScholarCross RefCross Ref
  19. Federico Nava, Donatella Sciuto, Marco Domenico Santambrogio, Stefan Herbrechtsmeier, Mario Porrmann, Ulf Witkowski, and Ulrich Rueckert. 2010. Applying dynamic reconfiguration in the mobile robotics domain: A case study on computer vision algorithms. ACM Transactions on Reconfigurable Technology and Systems 4, 3, Article No. 29. Google ScholarGoogle ScholarDigital LibraryDigital Library
  20. Xinyu Niu, Qiwei Jin, Wayne Luk, Qiang Liu, and Oliver Pell. 2012. Exploiting run-time reconfiguration in stencil computation. In Proceedings of the 2012 22nd International Conference on Field Programmable Logic and Applications (FPL’12). 173--180.Google ScholarGoogle ScholarCross RefCross Ref
  21. Everett H. Phillips and Massimiliano Fatica. 2010. Implementing the Himeno benchmark with CUDA on GPU clusters. In Proceedings of the 2010 IEEE International Symposium on Parallel and Distributed Processing (IPDPS’10). 1--10.Google ScholarGoogle Scholar
  22. Karthikeya Gajjala Purna and Dinesh Bhatia. 1999. Temporal partitioning and scheduling data flow graphs for reconfigurable computers. IEEE Transactions on Computers 48, 579--590. Google ScholarGoogle ScholarDigital LibraryDigital Library
  23. Pete Sedcole, Brandon Blodget, Tobias Becker, James Anderson, and Patrick Lysaght. 2006. Modular dynamic reconfiguration in Virtex FPGAs. IEE Proceedings: Computers and Digital Techniques 153, 3, 157--164.Google ScholarGoogle ScholarCross RefCross Ref
  24. Steve Young, Peter Alfke, Colm Fewer, Scott McMillan, Brandon Blodget, and Delon Levi. 2003. A high I/O reconfigurable crossbar switch. In Proceedings of the 11th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM’03). 3--10. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Automating Elimination of Idle Functions by Runtime Reconfiguration

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in

      Full Access

      • Published in

        cover image ACM Transactions on Reconfigurable Technology and Systems
        ACM Transactions on Reconfigurable Technology and Systems  Volume 8, Issue 3
        May 2015
        153 pages
        ISSN:1936-7406
        EISSN:1936-7414
        DOI:10.1145/2770880
        • Editor:
        • Steve Wilton
        Issue’s Table of Contents

        Copyright © 2015 ACM

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 11 May 2015
        • Accepted: 1 November 2014
        • Revised: 1 September 2014
        • Received: 1 April 2014
        Published in trets Volume 8, Issue 3

        Permissions

        Request permissions about this article.

        Request Permissions

        Check for updates

        Qualifiers

        • research-article
        • Research
        • Refereed

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader
      About Cookies On This Site

      We use cookies to ensure that we give you the best experience on our website.

      Learn more

      Got it!