Abstract
With the ever-increasing complexity of digital designs, debugging and evaluation face likewise increasing challenges. While recent advances in hardware/software co-simulation have been made, solutions for corresponding debugging and evaluation did not mature and improve in a similar fashion. In this article, we present a dedicated solution to ease the debugging and evaluation efforts, particularly focusing on full-system simulation. Improving significantly over existing solutions, the presented approach features a standards-compliant powerful and flexible method of deriving, logging, and filtering detailed status information from SystemC-based models. At the core of this approach are flexible scripting capabilities that may change all logging parameters during runtime, thus not requiring re-compiling the to-be-simulated model, as in many competing solutions. The approach is tested and benchmarked with a real-world full-system example, demonstrating the overall benefits. The presented solution is published as open source via github (see text) and, by strictly adhering to existing standards, is generally compatible with existing SystemC simulation environments.
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- 0xAX et al. 2015. Linux Inside. GitBook. Retrieved from https://0xax.gitbooks.io/linux-insides/content/.Google Scholar
- Accellera. 2015. Accellera working group for configuration, control and inspection. Retrieved from http://www.accellera.org/activities/committees/systemc-cci/.Google Scholar
- Aeroflex/Gaisler. 2015. Aeroflex/Gaisler IP and manual download. Retrieved from http://www.gaisler.com/index.php/downloads.Google Scholar
- B. Albertini, S. Rigo, G. Araujo, C. Araujo, E. Barros, and W. Azevedo. 2007. A computational reflection mechanism to support platform debugging in SystemC. In Proceedings of the 2007 5th IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS). 81--86. DOI:http://dx.doi.org/10.1145/1289816.1289838 Google Scholar
Digital Library
- Sergej Alekseev. 2006. Algorithms for optimally tracing time critical programs. In Proceedings of the International Conference on Software Engineering Research and Practice 8 Conference on Programming Languages and Compilers (SERP’06), vol. 2, 585--591.Google Scholar
- Eric Anderson, Christopher Hoover, Xiaozhou Li, and Joseph Tucek. 2009. Efficient tracing and performance analysis for large distributed systems. In Proceedings of the IEEE International Symposium on Modeling, Analysis 8 Simulation of Computer and Telecommunication Systems (MASCOTS’09). IEEE, 1--10. DOI:http://dx.doi.org/10.1109/MASCOT.2009.5366158Google Scholar
Cross Ref
- G. Beltrame, L. Fossati, and D. Sciuto. 2009. ReSP: A nonintrusive transaction-level reflective MPSoC simulation platform for design space exploration. IEEE Trans. Comput.-Aid. Des. Integr. Circ. Syst. 28, 12 (Dec 2009), 1857--1869. DOI:http://dx.doi.org/10.1109/TCAD.2009.2030268 Google Scholar
Digital Library
- Sascha Bischoff and Andreas Hansson. 2013. gem5 Tutorial. University of Southampton (Jul. 2013).Google Scholar
- Boost. 2015. Bracket chaining tutorial. Retrieved from http://www.boost.org/doc/libs/1_55_0/doc/html/program_options/tutorial.html.Google Scholar
- P. Chen, D. A. Kirkpatrick, and K. Keutzer. 2001. Scripting for EDA tools: A case study. In Proceedings of the Quality Electronic Design. IEEE, 87--93. DOI:http://dx.doi.org/10.1109/ISQED.2001.915211 Google Scholar
Digital Library
- Dave Beazley et al. 2015. Simplified wrapper and interface generator. Retrieved from http://www.swig.org.Google Scholar
- F. Doucet, S. Shukla, and R. Gupta. 2003. Introspection in system-level language frameworks: meta-level vs. integrated. In Proceedings of the Design, Automation and Test in Europe Conference and Exhibition, 2003. 382--387. DOI:http://dx.doi.org/10.1109/DATE.2003.1253638 Google Scholar
Digital Library
- Luca Fossati. 2010. TLM 2.0 Standard into Action: Designing Efficient Processor Simulators. In Proceedings of the IP-SoC 2010 Conference.Google Scholar
- Erich Gamma, Richard Helm, Ralph Johnson, and John Vlissides. 1995. Design Patterns: Elements of Reusable Object-oriented Software. Addison-Wesley Longman Publishing Co., Inc., Boston, MA. Google Scholar
Digital Library
- A. Gerstlauer, S. Chakravarty, M. Kathuria, and P. Razaghi. 2012. Abstract system-level models for early performance and power exploration. In Proceedings of the 2012 17th Asia and South Pacific Design Automation Conference (ASP-DAC). 213--218. DOI:http://dx.doi.org/10.1109/ASPDAC.2012.6164947Google Scholar
- Frank Ghenassia. 2005. Transaction-Level Modeling with SystemC: TLM Concepts and Applications for Embedded Systems. Springer US. Retrieved from https://books.google.nl/books?id=fUm0jwEACAAJ. Google Scholar
Digital Library
- Google et al. 2014. Google Style guide for C++. Retrieved from https://github.com/google/styleguide/blob/gh-pages/cppguide.html.Google Scholar
- Robert Günzel. 2010. GreenSocket -- Conceptual Details. GreenSocs. Retrieved from http://forge.pole-aquinetic.fr/projects/greenlib_project/repository/revisions/cecb1ab88e7cb245abf70cc48c1dddddc5b0362e/raw/greensocket/doc/gsock_tech.pdf.Google Scholar
- HDF group. 2015. The HDF group. Retrieved from http://www.hdfgroup.org.Google Scholar
- Ruben Heynssens. 2014. Performance analysis and benchmarking of python. Retrieved from http://lib.ugent.be/catalog/rug01:002153626.Google Scholar
- Wei Hong, A. Viehl, N. Bannow, C. Kerstan, H. Post, O. Bringmann, and W. Rosenstiel. 2012. CULT: A unified framework for tracing and logging c-based designs. In Proceedings of the System, Software, SoC and Silicon Debug Conference (S4D), 2012. 1--6.Google Scholar
- Shih-Hao Hung, Shu-Jheng Huang, and Chia-Heng Tu. 2008. New tracing and performance analysis techniques for embedded applications. In Proceedings of the 2008 14th IEEE International Conference on Embedded and Real-Time Computing Systems and Applications (RTCSA’08). IEEE, 143--152. DOI:http://dx.doi.org/10.1109/RTCSA.2008.14 Google Scholar
Digital Library
- IEEE-SA Standards Board. 2011. IEEE standard for standard SystemC language reference manual. IEEE Std 1666-2011 (Revision of IEEE Std 1666-2011) (09 2011). DOI:http://dx.doi.org/10.1109/IEEESTD.2012.6134619Google Scholar
- Roberto Ierusalimschy, Luiz Henrique De Figueiredo, and Waldemar Celes. 2011. Lua 5.2 reference manual. (2011). Retrieved from http://www.lua.org/manual/5.2/manual.html.Google Scholar
- Jiri Gaisler. 2002. A portable and fault-tolerant microprocessor based on the SPARC v8 architecture. In DSN. 409--415. Google Scholar
Digital Library
- Matthias Jurenz. 2013. TUD-ZIH -- VampirTrace. Retrieved from http://www.tu-dresden.de/zih/vampirtrace.Google Scholar
- Antti Kamppi, Joni-Matti Määttä, Lauri Matilainen, Erno Salminen, and Timo D Hämäläinen. 2012. Kactus2: Extended IP-XACT metadata based embedded system design environment. In Embedded Systems Week/MeCoES: Metamodeling and Code Generation for Embedded Systems Workshop. 17--22.Google Scholar
- Brad King. 2015. GCC-XML. Retrieved from http://www.gccxml.org/HTML/Index.html. (2015).Google Scholar
- Wolfgang Klingauf and Manuel Geffken. 2006. Design structure analysis and transaction recording in systemc designs: A minimal-intrusive approach. In Forum on Specification and Design Languages (FDL).Google Scholar
- Johan Kraft, Anders Wall, and Holger Kienle. 2010. Trace recording for embedded systems: Lessons learned from five industrial projects. In Runtime Verification, Howard Barringer, Ylies Falcone, Bernd Finkbeiner, Klaus Havelund, Insup Lee, Gordon Pace, Grigore Roşu, Oleg Sokolsky, and Nikolai Tillmann (Eds.). Lecture Notes in Computer Science, Vol. 6418. Springer, Berlin, 315--329. DOI:http://dx.doi.org/10.1007/978-3-642-16612-9_24 Google Scholar
Digital Library
- Rainer Leupers and Olivier Temam. 2010. Processor and System-on-Chip Simulation (1st ed.). Springer, Berlin. Google Scholar
Digital Library
- log4cxx. 2013. Short introduction to Apache log4cxx. Retrieved from http://logging.apache.org/log4cxx/. (2013).Google Scholar
- Robert Love. 2010. Linux Kernel Development. Pearson Education. Google Scholar
Digital Library
- Kun Lu, Daniel Müller-Gritschneder, and Ulf. Schlichtmann. 2012. Accurately timed transaction level models for virtual prototyping at high abstraction level. In Proceedings of the Conference on Design, Automation and Test in Europe (DATE’12). EDA Consortium, San Jose, CA, 135--140. Google Scholar
Digital Library
- J. Aldis M. Berrada. 2007. SystemPython: A python extension to control systemc SoC simulations. In Proceedings of the GreenSocs Meeting Presentation, Design and Test in Europe Conference (DATE).Google Scholar
- R. Meyer, J. Wagner, R. Buchty, and M. Berekovic. 2015. Universal scripting interface for SystemC. In Proceedings of the 2015 DVCon Europe Conference. Retrieved from https://dvcon-europe.org/sites/dvcon-europe.org/files/archive/2015/proceedings/DVCon_Europe_2015_TA3_1_Paper.pdf.Google Scholar
- Matthias S. Müller, Andreas Knüpfer, Matthias Jurenz, Matthias Lieber, Holger Brunst, Hartmut Mix, and Wolfgang E. Nagel. 2007. Developing scalable applications with Vampir, VampirServer and VampirTrace. In PARCO, Vol. 15. Citeseer, 637--644.Google Scholar
- OSCI CCI WG. 2009. Requirements specification for configuration interfaces. Retrieved from http://accellera.org/images/downloads/drafts-review/configuration_requirements-091218.pdf.Google Scholar
- PRQA. 2013. High Integrity C++ Coding Standard Version 4.0. Retrieved from http://www.codingstandard.com/section/index/.Google Scholar
- Frank Rogin, Erhard Fehlauer, Steffen Rülke, Sebastian Ohnewald, and Thomas Berndt. 2007. Advances in Design and Specification Languages for Embedded Systems: Selected Contributions from FDL’06. Springer Netherlands, Dordrecht, Chapter Nonintrusive High-level SystemC Debugging, 131--144. DOI:http://dx.doi.org/10.1007/978-1-4020-6149-3_8 Google Scholar
Digital Library
- Stefan Roiser and P. Mato. 2004. The SEAL C++ reflection system. Computing in High Energy Physics and Nuclear Physics 2004 (2004). DOI:http://dx.doi.org/10.5170/CERN-2005-002.437Google Scholar
- Robert Sauter, Olga Saukh, Oliver Frietsch, and Pedro José Marrón. 2011. TinyLTS: Efficient network-wide logging and tracing system for TinyOS. In Proceedings of the 2011 Proceedings IEEE INFOCOM. IEEE, 2033--2041. DOI:http://dx.doi.org/10.1109/INFCOM.2011.5935011Google Scholar
Cross Ref
- Robert Schöne, Ronny Tschüter, Thomas Ilsche, and Daniel Hackenberg. 2011. Euro-Par 2010 Parallel Processing Workshops: HeteroPar, HPCC, HiBB, CoreGrid, UCHPC, HPCF, PROPER, CCPI, VHPC, Ischia, Italy, August 31--September 3, 2010, Revised Selected Papers. Springer, Berlin, 501--511. DOI:http://dx.doi.org/10.1007/978-3-642-21878-1_62Google Scholar
- Christian Schröder, Wolfgang Klingauf, Robert Günzel, Mark Burton, and Eric Roesler. 2009. Configuration and control of SystemC models using TLM middleware. In Proceedings of the 7th IEEE/ACM International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS’09). ACM, New York, NY, 81--88. DOI:http://dx.doi.org/10.1145/1629435.1629447 Google Scholar
Digital Library
- T. Schuster, R. Meyer, R. Buchty, L. Fossati, and M. Berekovic. 2014. SoCRocket -- a virtual platform for the European space agency’s SoC development. In Proceedings of the 9th International Symposium on Reconfigurable and Communication-Centric Systems-on-Chip (ReCoSoC’14). 1--7. DOI:http://dx.doi.org/10.1109/ReCoSoC.2014.6860690Google Scholar
- SoCRocket. 2015. SoCRocket sources. Retrieved from https://github.com/socrocket. (2015).Google Scholar
- Synopsys 2015. VP Explorer User’s Guide. Synopsys.Google Scholar
- Synopsys. 2016. SCML Source Code Kit. Retrieved from https://www.synopsys.com/cgi-bin/slcw/kits/reg.cgi. (2016).Google Scholar
- E. Todorovich and O. Cadenas. 2007. TCL/TK for EDA tools. In Proceedings of the 2007 3rd Southern Conference on Programmable Logic, 2007. SPL’07. 107--112. DOI:http://dx.doi.org/10.1109/SPL.2007.371732Google Scholar
- Jan Valdman. 2001. Log file analysis. Department of Computer Science and Engineering (FAV UWB)., Technical Report DCSE/TR-2001-04 (2001). Retrieved from https://www.kiv.zcu.cz/site/documents/verejne/vyzkum/publikace/technicke-zpravy/2001/tr-2001-04.pdf.Google Scholar
- Chad Verbowski, Emre Kiciman, Arunvijay Kumar, Brad Daniels, Shan Lu, Juhan Lee, Yi-Min Wang, and Roussi Roussev. 2006. Flight data recorder: Monitoring persistent-state interactions to improve systems management. In Proceedings of the 7th USENIX Symposium on Operating Systems Design and Implementation, Volume 7 (OSDI’06). USENIX Association, Berkeley, CA, 9--9. Google Scholar
Digital Library
- J. Wagner, R. Meyer, R. Buchty, and M. Berekovic. 2015. A scriptable, standards-compliant reporting and logging extension for SystemC. In Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS). 366--371. DOI:http://dx.doi.org/10.1109/SAMOS.2015.7363700Google Scholar
Cross Ref
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A Scriptable Standard-Compliant Reporting and Logging Framework for SystemC
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