Abstract
Power estimation has become a strongly desired feature in Electronic System Level (ESL) simulations. Most existing power estimation approaches for this abstraction level require component models with observable internals. However, most ESL models of modern processors are delivered as black box components. This work presents a tool-based ESL power estimation methodology for black box models and its extension for multiple clock frequencies. The evaluation uses hardware measurements of the ARM Cortex-A9 subsystem of the OMAP4460 chip for reference. The achieved estimation error is 5% on average for fixed-frequency power models and 7% for multifrequency power models.
- Aceplorer. 2014. Docea Aceplorer. (2014) Retrieved August 13, 2016 from http://www.doceapower.com/index.php?option=com_content8view=article8id=18Itemid=102.Google Scholar
- Adi Ben-Israel and Thomas N. E. Greville. 2003. Generalized Inversions: Theory and Applications (2nd ed.). Springer, New York.Google Scholar
- Luca Benini, Alessandro Bogliolo, Michele Favalli, and Giovanni De Micheli. 1998a. Regression models for behavioral power estimation. Integrated Computer-Aided Engineering 5, 2 (1998), 95--106. Google Scholar
Digital Library
- Luca Benini, Robin Hodgson, and Polly Siegel. 1998b. System-level power estimation and optimization. In International Symposium on Low Power Electronics and Design (ISLPED’98). ACM, 173--178. Google Scholar
Digital Library
- Rasmus Bro and Sijmen de Jong. 1997. A fast non-negativity-constrained least squares algorithm. Journal of Chemometrics 11 (September 1997), 393--401.Google Scholar
Cross Ref
- David Brooks, Vivek Tiwari, and Margaret Martonosi. 2000. Wattch: A framework for architectural-level power analysis and optimizations. In Proceedings of the 27th International Symposium on Computer Architecture. ACM, 83--94. Google Scholar
Digital Library
- Lieven Eeckhout and Koen De Bosschere. 2001. Early design phase power/performance modeling through statistical simulation. In Proceedings of the Symposium on Performance Analysis of Systems and Software. IEEE, 10--17.Google Scholar
Cross Ref
- William Fornaciari, Paolo Gubian, Donatella Sciuto, and Cristina Silvano. 1998. Power estimation of embedded systems: A hardware/software codesign approach. In Very Large Scale Integration Systems. Kluwer Academic Publishers, 249--258. Google Scholar
Digital Library
- Tony Givargis, Frank Vahid, and Jörg Henkel. 2002. Instruction-based system-level power evaluation of system-on-a-chip peripheral cores. Very Large Scale Integration Systems (December 2002), 856--863. Google Scholar
Digital Library
- Kim Grüttner, Philipp A. Hartmann, Tiemo Fandrey, Kai Hylla, Daniel Lorenz, Stefan Stattelmann, Björn Sander, Oliver Bringmann, Wolfgang Nebel, and Wolfgang Rosenstiel. 2014. An ESL timing and power estimation and simulation framework for heterogeneous SoCs. In Proceedings of the International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. 181--190.Google Scholar
Cross Ref
- Matthew R. Guthaus, Jeffrey S. Ringenberg, Dan Ernst, Todd M. Austin, Trevor Mudge, and Richard B. Brown. 2001. MiBench: A free, commercially representative embedded benchmark suite. In Workload Characterization, WWC-4. IEEE CS, 3--14. Google Scholar
Digital Library
- Chen-Wei Hsu, Jia-Lu Liao, Shan-Chien Fang, Chia-Chien Weng, Shi-Yu Huang, Wen-Tsan Hsieh, and Jen-Chieh Yeh. 2011. Power depot: Integrating IP-based power modeling with ESL power analysis for multicore SoC designs. In Proceedings of the 48th Design and Automation Conference. ACM, 47--52. Google Scholar
Digital Library
- Nathalie Julien, Johann Laurent, Eric Senn, and Eric Martin. 2003. Power consumption modeling and characterization of the TI C6201. IEEE Micro 23 (2003), 40--49. Google Scholar
Digital Library
- Matthias Jung, Christian Weis, Patrick Bertram, Gunnar Braun, and Norbert Wehn. 2013. Power modelling of 3D-stacked memories with TLM2.0 based virtual platforms. In Proccedings of the Synopsys User Group Conference.Google Scholar
- Johann Laurent, Eric Senn, Nathalie Julien, and Eric Martin. 2001. High level energy estimation for DSP systems. In Proceedings of the International Workshop on Power and Timing Modeling and Optimization and Simulation PATMOS01. 3.1.1--3.1.10.Google Scholar
- OMAP4460. 2011. OMAP4460 Multimedia Device Silicon Revision 1.x Technical Reference Manual. (2011). Retrieved August 13, 2016 from http://www.ti.com/product/omap4460.Google Scholar
- Gereon Onnebrink, Stefan Schürmans, Florian Walbroel, Rainer Leupers, Gerd Ascheid, Xiaotao Chen, and YwhPyng Harn. 2016. Black box power estimation for digital signal processors using virtual platforms. In Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO’16). 6:1--6:6. Google Scholar
Digital Library
- OVP. 2015. Open Virtual Platforms simulators 20151203. (2015). Retrieved August 13, 2016 from http://ovpworld.org.Google Scholar
- Pandaboard. 2011. OMAP4460 Pandaboard ES System Reference Manual. (2011). Retrieved August 13, 2016 from http://pandaboard.org/content/resources/references.Google Scholar
- Santhosh Kumar Rethinagiri, Rabie ben Atitallah, and Jean-Luc Dekeyser. 2011. A system level power consumption estimation for MPSoC. In Proceedings of the 2011 International Symposium on System on Chip. IEEE, 56--61.Google Scholar
Cross Ref
- Felipe Rosa, Luciano Ost, Ricardo Reis, and Gilles Sassatelli. 2013. Instruction-driven timing CPU model for efficient embedded software development using OVP. In Proceedings of the 2013 IEEE 20th International Conference on Electronics, Circuits, and Systems. 855--858.Google Scholar
Cross Ref
- Stefan Schürmans, Gereon Onnebrink, Rainer Leupers, Gerd Ascheid, and Xiaotao Chen. 2015. ESL power estimation using virtual platforms with black box processor models. In Proceedings of the 2015 International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. 354--359.Google Scholar
Cross Ref
- Stefan Schürmans, Diandian Zhang, Dominik Auras, Rainer Leupers, Gerd Ascheid, Xiaotao Chen, and Lun Wang. 2013. Creation of ESL power models for communication architectures using automatic calibration. In Proceedings of the 50th Design Automation Conference (DAC’13). ACM, 58:1--58:58. Google Scholar
Digital Library
- Magnus Själander, Sally A. McKee, Peter Brauer, David Engdal, and Andràs Vajda. 2012. An LTE uplink receiver PHY benchmark and subframe-based power management. In Proceedings of the 2012 IEEE International Symposium on Performance Analysis of Systems and Software. IEEE, 25--34. Google Scholar
Digital Library
- Martin Streubühr, Rafael Rosales, Ralph Hasholzner, Christian Haubelt, and Jürgen Teich. 2011. ESL power and performance estimation for heterogeneous MPSoCs using SystemC. In Proceedings of the 2011 Forum on Specification and Design Languages. 1--8.Google Scholar
- Synopsys Platform Architect. 2016. Synopsys Platform Architect. (2016). Retrieved August 13, 2016 from http://www.synopsys.com/Prototyping/ArchitectureDesign/Pages/platform-architect.aspx.Google Scholar
- Synopsys Virtualizer. 2016. Synopsys Virtualizer. (2016). Retrieved August 13, 2016 from http://www.synopsys.com/prototyping/virtualprototyping/pages/virtualizer.aspx.Google Scholar
- SystemC. 2014. SystemC 2.3. (2014). Retrieved August 13, 2016 from http://www.accellera.org/downloads/standards/systemc.Google Scholar
- William Thies, Michal Karczmarek, and Saman Amarasinghe. 2002. StreamIt: A language for streaming applications. In Proceedings of the International Conference on Compiler Construction. 179--196. Google Scholar
Digital Library
- Vivek Tiwari, Sharad Malik, and Andrew Wolfe. 1994. Power analysis of embedded software: A first step towards software power minimization. IEEE Transactions on Very Large Scale Integration Systems 2, 4 (December 1994), 437--445. Google Scholar
Digital Library
- USB-DUXfast. 2005. USB-DUXfast Technical Specification. (2005). Retrieved August 13, 2016 from http://www.linux-usb-daq.co.uk/tech2_duxfast/.Google Scholar
- Yossi Veller and Shabatay Matalon. 2010. Why You Should Optimize Power at the ESL. (2010). Retrieved August 13, 2016 from http://go.mentor.com/cvtq.Google Scholar
- Reinhold P. Weicker. 1984. Dhrystone: A synthetic systems programming benchmark. Commications of the ACM (October 1984), 1013--1030. Google Scholar
Digital Library
- Wu Ye, Narayanan Vijaykrishnan, Mahmut Kandemir, and Mary J. Irwin. 2000. The design and use of SimplePower: A cycle-accurate energy estimation tool. In Proceedings of the 37th Design Automation Conference (DAC’00). ACM, 340--345. Google Scholar
Digital Library
- Qi Zheng, Yajing Chen, Ronald Dreslinski, Chaitali Chakrabarti, Achilleas Anastasopoulos, Scott Mahlke, and Trevor Mudge. 2013. WiBench: An open source kernel suite for benchmarking wireless systems. In Proceedings of the 2013 IEEE International Symposium on Workload Characterization. 123--132.Google Scholar
Cross Ref
Index Terms
Frequency-Aware ESL Power Estimation for ARM Cortex-A9 Using a Black Box Processor Model
Recommendations
ESL Black Box Power Estimation: Automatic Calibration for IEEE UPF 3.0 Power Models
RAPIDO '18: Proceedings of the Rapido'18 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsPower-aware design space exploration at early electronic system level (ESL) is highly facilitated by virtual platforms. In order to define and exchange power models, the IEEE standard 1801-2015 -- UPF has been defined to allow developers, vendors and ...
Black box power estimation for digital signal processors using virtual platforms
RAPIDO '16: Proceedings of the 2016 Workshop on Rapid Simulation and Performance Evaluation: Methods and ToolsComplex many-core architectures are seen as the solution to tackle the computational workloads of the next years. To find the best trade-off between power and performance, different processor architectures have to be considered and evaluated in a ...
Creation of ESL power models for communication architectures using automatic calibration
DAC '13: Proceedings of the 50th Annual Design Automation ConferencePower consumption is an important factor in chip design. The fundamental design decisions drawn during early design space exploration at electronic system level (ESL) have a large impact on the power consumption. This requires to estimate power already ...






Comments