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A compiler for throughput optimization of graph algorithms on GPUs

Published:19 October 2016Publication History
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Abstract

Writing high-performance GPU implementations of graph algorithms can be challenging. In this paper, we argue that three optimizations called throughput optimizations are key to high-performance for this application class. These optimizations describe a large implementation space making it unrealistic for programmers to implement them by hand.

To address this problem, we have implemented these optimizations in a compiler that produces CUDA code from an intermediate-level program representation called IrGL. Compared to state-of-the-art handwritten CUDA implementations of eight graph applications, code generated by the IrGL compiler is up to 5.95x times faster (median 1.4x) for five applications and never more than 30% slower for the others. Throughput optimizations contribute an improvement up to 4.16x (median 1.4x) to the performance of unoptimized IrGL code.

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      • Published in

        cover image ACM SIGPLAN Notices
        ACM SIGPLAN Notices  Volume 51, Issue 10
        OOPSLA '16
        October 2016
        915 pages
        ISSN:0362-1340
        EISSN:1558-1160
        DOI:10.1145/3022671
        Issue’s Table of Contents
        • cover image ACM Conferences
          OOPSLA 2016: Proceedings of the 2016 ACM SIGPLAN International Conference on Object-Oriented Programming, Systems, Languages, and Applications
          October 2016
          915 pages
          ISBN:9781450344449
          DOI:10.1145/2983990

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