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Microarchitectural Comparison of the MXP and Octavo Soft-Processor FPGA Overlays

Published:27 May 2017Publication History
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Abstract

Field-Programmable Gate Arrays (FPGAs) can yield higher performance and lower power than software solutions on CPUs or GPUs. However, designing with FPGAs requires specialized hardware design skills and hours-long CAD processing times. To reduce and accelerate the design effort, we can implement an overlay architecture on the FPGA, on which we then more easily construct the desired system but at a large cost in performance and area relative to a direct FPGA implementation. In this work, we compare the micro-architecture, performance, and area of two soft-processor overlays: the Octavo multi-threaded soft-processor and the MXP soft vector processor. To measure the area and performance penalties of these overlays relative to the underlying FPGA hardware, we compare direct FPGA implementations of the micro-benchmarks written in C synthesized with the LegUp HLS tool and also written in the Verilog HDL. Overall, Octavo’s higher operating frequency and MXP’s more efficient code execution results in similar performance from both, within an order of magnitude of direct FPGA implementations, but with a penalty of an order of magnitude greater area.

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  1. Microarchitectural Comparison of the MXP and Octavo Soft-Processor FPGA Overlays

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            • Published in

              cover image ACM Transactions on Reconfigurable Technology and Systems
              ACM Transactions on Reconfigurable Technology and Systems  Volume 10, Issue 3
              September 2017
              187 pages
              ISSN:1936-7406
              EISSN:1936-7414
              DOI:10.1145/3102109
              • Editor:
              • Steve Wilton
              Issue’s Table of Contents

              Copyright © 2017 ACM

              Publisher

              Association for Computing Machinery

              New York, NY, United States

              Publication History

              • Published: 27 May 2017
              • Accepted: 1 February 2017
              • Revised: 1 January 2017
              • Received: 1 January 2016
              Published in trets Volume 10, Issue 3

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