Abstract
Write amplification is a critical factor that limits the stable performance of flash-based storage systems. To reduce write amplification, this article presents a new technique that cooperatively manages data in flash storage and nonvolatile memory (NVM). Our scheme basically considers NVM as the cache of flash storage, but allows the original data in flash storage to be invalidated if there is a cached copy in NVM, which can temporarily serve as the original data. This scheme eliminates the copy-out operation for a substantial number of cached data, thereby enhancing garbage collection efficiency. Simulated results show that the proposed scheme reduces the copy-out overhead of garbage collection by 51.4% and decreases the standard deviation of response time by 35.4% on average. Measurement results obtained by implementing the proposed scheme in BlueDBM,1 an open-source flash development platform developed by MIT, show that the proposed scheme reduces the execution time and increases IOPS by 2--21% and 3--18%, respectively, for the workloads that we considered. This article is an extended version of Lee et al. [2016], which was presented at the 32nd International Conference on Massive Data Storage Systems and Technology in 2016.
- D. Apalkov, A. Khvalkovskiy, S. Watts, V. Nikitin, X. Tang, D. Lottis, K. Moon, X. Luo, E. Chen, A. Ong, A. Driskill-Smith, and M. Krounbi. 2013. Spin-transfer torque magnetic random access memory (STT-MRAM). ACM J. Emerg. Technol. Comput. Syst. 9, 2, 13.Google Scholar
Digital Library
- N. Agrawal, V. Prabhakaran, T. Wobber, J. Davis, M. Manasse, and R. Panigrahy. 2008. Design tradeoffs for SSD performance. In Proceedings of the USENIX Annual Technical Conference (ATC’08), 57--70.Google Scholar
Digital Library
- S. Boboila and P. Desnoyers. 2010. Write endurance in flash drives: Measurements and analysis. In Proceedings of the 8th USENIX Conference on File and Storage Technologies (FAST’10), 115--128.Google Scholar
Digital Library
- J. Condit, E. B. Nightingale, C. Frost, E. Ipek, B. Lee, D. Burger, and D. Coetzee. 2009. Better I/O through byte-addressable, persistent memory. In Proceedings of the 22nd ACM Symposium on Operating Systems Principles (SOSP’09), 133--146.Google Scholar
- P. Desnoyers. 2012. Analytic modeling of SSD write performance. In Proceedings of the 5th ACM International Systems and Storage Conference (SYSTOR’12).Google Scholar
Digital Library
- P. Desnoyers. 2014. Analytic models of SSD write performance. ACM Trans. Storage 10, 2, 8.Google Scholar
Digital Library
- I. H. Doh, J. Choi, and S. H. Noh. 2011. An empirical study of deploying storage class memory into the I/O path of portable systems. Comput. J. 8, 3.Google Scholar
- S. R. Dulloor, S. Kumar, A. Keshavamurthy, P. Lantz, D. Reddy, R. Sankaran, and J. Jackson. 2014. System software for persistent memory. In Proceedings of the 9th European Conference on Computer Systems (EuroSys’14).Google Scholar
- J. Guo, C. Min, T. Cai, and Y. Chen. 2016. A design to reduce write amplification in object-based NAND flash devices. In Proceedings of the 11th IEEE/ACM/IFIP International Conference On Hardware/Software Codesign and System Synthesis (CODES’16), 5.Google Scholar
- R. L. Horn. 2015. Dynamic overprovisioning for data storage systems. U.S. Patent No. 9,141,532. 22 Sep. 2015.Google Scholar
- A. Huffman. 2014. NVM express: Going mainstream and what's next. Intel Developers Forum 20 (2014).Google Scholar
- A. Jagmohan, M. Franceschini, and L. Lastras. 2010. Write amplification reduction in NAND flash through multi-write coding. In Proceedings of the 26th IEEE Symposium on Mass Storage Systems and Technologies (MSST’10).Google Scholar
- JEDEC. 2012. Master trace for 128GB SSD. Retrieved from http://www.jedec.org/standards-documents/docs/ jesd219a_mt.Google Scholar
- J. Kang, J. Hyun, H. Maeng, and S. Cho. 2014. The multi-streamed solid-state drive. In Proceedings of the 6th USENIX Workshop on Hot Topics in Storage and File Systems (HotStorage’14).Google Scholar
- D. Kang, C. Min, and Y. Eom. 2014. An efficient buffer replacement algorithm for NAND flash storage devices. In Proceedings of the 22nd IEEE Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems (MASCOTS’14), 239--248.Google Scholar
- J. Kim, J. M. Kim, S. H. Noh, S. L. Min, and Y. Cho. 2002. A space-efficient flash translation layer for compact flash systems. IEEE Trans. Consum. Electron. 48, 2.Google Scholar
- B. C. Lee, E. Ipek, O. Mutlu, and D. Burger. 2010. Phase change memory architecture and the quest for scalability. Communications of the ACM 53, 7 (2010), 99--106.Google Scholar
Digital Library
- E. Lee, H. Bahn, and S. H. Noh. 2013. Unioning of the buffer cache and journaling layers with non-volatile memory. In Proceedings of the 11th USENIX Conference on File and Storage Technologies (FAST’13), 73--80.Google Scholar
Digital Library
- E. Lee, J. Kim, H. Bahn, and S. H. Noh. 2016. Reducing write amplification of flash storage through cooperative data management with NVM. In Proceedings of the 32nd International Conference on Massive Data Storage Systems and Technology (MSST’16).Google Scholar
- S. Lee, H. Bahn, and S. H. Noh. 2014. CLOCK-DWF: A write-history-aware page replacement algorithm for hybrid PCM and DRAM memory architectures. IEEE Trans. Comput. 63, 9, 2187--2200.Google Scholar
Digital Library
- S. Lee, M. Liu, S. Jun, S. Xu, J. Kim, and Arvind. 2016. Application-managed flash. In Proceedings of the 14th USENIX Conference on File and Storage Technologies (FAST’16), 339--353.Google Scholar
Digital Library
- Y. Li and K. N. Quader. 2013. NAND flash memory: Challenges and opportunities. Computer, 23--29.Google Scholar
- Y. Lu, J. Shu, and W. Zheng. 2013. Extending the lifetime of flash-based storage through reducing write amplification from file systems. In Proceedings of the 11th USENIX Conference on File and Storage Technologies (FAST’13), 257--270.Google Scholar
- J. C. Mogul, E. Argollo, M. Shah, and P. Faraboschi. 2009. Operating system support for NVM+DRAM hybrid main memory. In Proceedings of USENIX Workshop on Hot Topics in Operating Systems (HotOS’09).Google Scholar
- S. Moon and A. L. N. Reddy. 2016. Does RAID improve lifetime of SSD arrays? ACM Trans. Storage 12, 3, 11.Google Scholar
Digital Library
- M. K. Qureshi, V. Srinivasan, and J. A. Rivers. 2009. Scalable high performance main memory system using phase-change memory technology. In Proceedings of the 36th International Symposium on Computer Architecture (ISCA’09), 24--33.Google Scholar
- F. Shu. 2007. Data set management commands proposal for ATA8-ACS2. T13 Technical Committee, United States: At Attachment:e07154r1.Google Scholar
- D. Skourtis, D. Achlioptas, N. Watkins, C. Maltzahn, and S. Brandt. 2014. Flash on rails: Consistent flash performance through redundancy. In Proceedings of the USENIX Annual Technical Conference (ATC’14), 463--474.Google Scholar
- UMASS trace repository. 2009. Retrieved from http://traces.cs.umass.edu.Google Scholar
- XPoint. Retrieved from https://en.wikipedia.org/wiki/3D_XPoint.Google Scholar
- Y. Yang and J. Zhu. 2015. Algebraic modeling of write amplification in hotness-aware SSD. In Proceedings of the 8th ACM International Systems and Storage Conference (SYSTOR’15).Google Scholar
- M. Yang, Y. Chang, C. Tsao, and P. Huang. 2013. New ERA: New efficient reliability-aware wear leveling for endurance enhancement of flash storage devices. In Proceedings of the 50th Annual Design Automation Conference (DAC’13).Google Scholar
- O. Zilberberg, S. Weiss, and S. Toledo. 2013. Phase-change memory: An architectural perspective. ACM Comput. Surv., 45, 3.Google Scholar
Digital Library
Index Terms
Reducing Write Amplification of Flash Storage through Cooperative Data Management with NVM
Recommendations
Write amplification analysis in flash-based solid state drives
SYSTOR '09: Proceedings of SYSTOR 2009: The Israeli Experimental Systems ConferenceWrite amplification is a critical factor limiting the random write performance and write endurance in storage devices based on NAND-flash memories such as solid-state drives (SSD). The impact of garbage collection on write amplification is influenced by ...
Hybrid Associative Flash Translation Layer for the Performance Optimization of Chip-Level Parallel Flash Memory
Flash memory is used widely in the data storage market, particularly low-price MultiLevel Cell (MLC) flash memory, which has been adopted by large-scale storage systems despite its low performance. To overcome the poor performance of MLC flash memory, a ...
Write Activity Minimization for Nonvolatile Main Memory Via Scheduling and Recomputation
Nonvolatile memories such as Flash memory, phase change memory (PCM), and magnetic random access memory (MRAM) have many desirable characteristics for embedded systems to employ them as main memory. However, there are two common challenges we need to ...






Comments