skip to main content
article

Repairing sequential consistency in C/C++11

Published:14 June 2017Publication History
Skip Abstract Section

Abstract

The C/C++11 memory model defines the semantics of concurrent memory accesses in C/C++, and in particular supports racy "atomic" accesses at a range of different consistency levels, from very weak consistency ("relaxed") to strong, sequential consistency ("SC"). Unfortunately, as we observe in this paper, the semantics of SC atomic accesses in C/C++11, as well as in all proposed strengthenings of the semantics, is flawed, in that (contrary to previously published results) both suggested compilation schemes to the Power architecture are unsound. We propose a model, called RC11 (for Repaired C11), with a better semantics for SC accesses that restores the soundness of the compilation schemes to Power, maintains the DRF-SC guarantee, and provides stronger, more useful, guarantees to SC fences. In addition, we formally prove, for the first time, the correctness of the proposed stronger compilation schemes to Power that preserve load-to-store ordering and avoid "out-of-thin-air" reads.

References

  1. C/C++11 mappings to processors, available at http://www. cl.cam.ac.uk/~pes20/cpp/cpp0xmappings.html. {Online; accessed 27-September-2016}.Google ScholarGoogle Scholar
  2. Crossbeam: support for concurrent and parallel programming, available at https://github.com/aturon/crossbeam. {Online; accessed 24-October-2016}.Google ScholarGoogle Scholar
  3. Supplementary material for this paper, available at http: //plv.mpi-sws.org/scfix/.Google ScholarGoogle Scholar
  4. J. Alglave, L. Maranget, and M. Tautschnig. Herding cats: Modelling, simulation, testing, and data mining for weak memory. ACM Trans. Program. Lang. Syst., 36(2):7:1–7:74, July 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  5. M. Batty, A. F. Donaldson, and J. Wickerson. Overhauling SC atomics in C11 and OpenCL. In POPL 2016, pages 634–648. ACM, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  6. M. Batty, K. Memarian, K. Nienhuis, J. Pichon-Pharabod, and P. Sewell. The problem of programming language concurrency semantics. In ESOP 2015, pages 283–307. Springer, 2015.Google ScholarGoogle ScholarCross RefCross Ref
  7. M. Batty, K. Memarian, S. Owens, S. Sarkar, and P. Sewell. Clarifying and compiling C/C++ concurrency: From C++11 to POWER. In POPL 2012, pages 509–520. ACM, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. M. Batty, S. Owens, S. Sarkar, P. Sewell, and T. Weber. Mathematizing C++ concurrency. In POPL 2011, pages 55–66. ACM, 2011. Google ScholarGoogle ScholarDigital LibraryDigital Library
  9. H.-J. Boehm. Can seqlocks get along with programming language memory models? In MSPC 2012, pages 12–20. ACM, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  10. H.-J. Boehm and S. V. Adve. Foundations of the C++ concurrency memory model. In PLDI 2008, pages 68–78. ACM, 2008. Google ScholarGoogle ScholarDigital LibraryDigital Library
  11. H.-J. Boehm and B. Demsky. Outlawing ghosts: Avoiding out-of-thin-air results. In MSPC 2014, pages 7:1–7:6. ACM, 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  12. M. Dodds, M. Batty, and A. Gotsman. C/C++ causal cycles confound compositionality. TinyToCS, 2, 2013.Google ScholarGoogle Scholar
  13. S. Flur, K. E. Gray, C. Pulte, S. Sarkar, A. Sezgin, L. Maranget, W. Deacon, and P. Sewell. Modelling the ARMv8 architecture, operationally: Concurrency and ISA. In POPL 2016, pages 608–621. ACM, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. Intel. A formal specification of Intel Itanium processor family memory ordering, 2002. http://download.intel.com/ design/Itanium/Downloads/25142901.pdf. {Online; accessed 14-November-2016}.Google ScholarGoogle Scholar
  15. A. Jeffrey and J. Riely. On thin air reads: Towards an event structures model of relaxed memory. In LICS 2016, pages 759–767. ACM, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  16. J. Kang, C.-K. Hur, O. Lahav, V. Vafeiadis, and D. Dreyer. A promising semantics for relaxed-memory concurrency. In POPL 2017, pages 175–189. ACM, 2017. Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. O. Lahav, N. Giannarakis, and V. Vafeiadis. Taming releaseacquire consistency. In POPL 2016, pages 649–662. ACM, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  18. O. Lahav and V. Vafeiadis. Owicki-Gries reasoning for weak memory models. In ICALP 2015, pages 311–323. Springer, 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  19. O. Lahav and V. Vafeiadis. Explaining relaxed memory models with program transformations. In FM 2016, pages 479–495. Springer, 2016.Google ScholarGoogle Scholar
  20. L. Lamport. How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Trans. Computers, 28(9):690–691, 1979. Google ScholarGoogle ScholarDigital LibraryDigital Library
  21. N. M. Lˆe, A. Pop, A. Cohen, and F. Zappa Nardelli. Correct and efficient work-stealing for weak memory models. In PPoPP 2013, pages 69–80. ACM, 2013.Google ScholarGoogle Scholar
  22. Y. A. Manerkar, C. Trippel, D. Lustig, M. Pellauer, and M. Martonosi. Counterexamples and proof loophole for the C/C++ to POWER and ARMv7 trailing-sync compiler mappings. arXiv preprint arXiv:1611.01507, 2016.Google ScholarGoogle Scholar
  23. L. Maranget, S. Sarkar, and P. Sewell. A tutorial introduction to the ARM and POWER relaxed memory models. http://www.cl.cam.ac.uk/˜pes20/ppc-supplemental/test7.pdf, 2012.Google ScholarGoogle Scholar
  24. B. Norris and B. Demsky. CDSchecker: checking concurrent data structures written with C/C++ atomics. In OOPSLA 2013, pages 131–150. ACM, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. S. Owens, S. Sarkar, and P. Sewell. A better x86 memory model: x86-TSO. In TPHOLs 2009, pages 391–407. Springer-Verlag, 2009. Google ScholarGoogle ScholarDigital LibraryDigital Library
  26. J. Pichon-Pharabod and P. Sewell. A concurrency semantics for relaxed atomics that permits optimisation and avoids thinair executions. In POPL 2016, pages 622–633. ACM, 2016. Google ScholarGoogle ScholarDigital LibraryDigital Library
  27. S. Sarkar, K. Memarian, S. Owens, M. Batty, P. Sewell, L. Maranget, J. Alglave, and D. Williams. Synchronising C/C++ and POWER. In PLDI 2012, pages 311–322. ACM, 2012. Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. D. Shasha and M. Snir. Efficient and correct execution of parallel programs that share memory. ACM Trans. Program. Lang. Syst., 10(2):282–312, Apr. 1988. Google ScholarGoogle ScholarDigital LibraryDigital Library
  29. A. Turon, V. Vafeiadis, and D. Dreyer. GPS: Navigating weak memory with ghosts, protocols, and separation. In OOPSLA 2014, pages 691–707. ACM, 2014. Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. V. Vafeiadis, T. Balabonski, S. Chakraborty, R. Morisset, and F. Zappa Nardelli. Common compiler optimisations are invalid in the C11 memory model and what we can do about it. In POPL 2015, pages 209–220. ACM, 2015. Google ScholarGoogle ScholarDigital LibraryDigital Library
  31. V. Vafeiadis and C. Narayan. Relaxed separation logic: A program logic for C11 concurrency. In OOPSLA 2013, pages 867–884. ACM, 2013. Google ScholarGoogle ScholarDigital LibraryDigital Library
  32. J. Wickerson, M. Batty, T. Sorensen, and G. A. Constantinides. Automatically comparing memory consistency models. In POPL 2017, pages 190–204. ACM, 2017. Google ScholarGoogle ScholarDigital LibraryDigital Library

Index Terms

  1. Repairing sequential consistency in C/C++11

      Recommendations

      Comments

      Login options

      Check if you have access through your login credentials or your institution to get full access on this article.

      Sign in

      Full Access

      • Published in

        cover image ACM SIGPLAN Notices
        ACM SIGPLAN Notices  Volume 52, Issue 6
        PLDI '17
        June 2017
        708 pages
        ISSN:0362-1340
        EISSN:1558-1160
        DOI:10.1145/3140587
        Issue’s Table of Contents
        • cover image ACM Conferences
          PLDI 2017: Proceedings of the 38th ACM SIGPLAN Conference on Programming Language Design and Implementation
          June 2017
          708 pages
          ISBN:9781450349888
          DOI:10.1145/3062341

        Copyright © 2017 ACM

        Publisher

        Association for Computing Machinery

        New York, NY, United States

        Publication History

        • Published: 14 June 2017

        Check for updates

        Qualifiers

        • article

      PDF Format

      View or Download as a PDF file.

      PDF

      eReader

      View online with eReader.

      eReader
      About Cookies On This Site

      We use cookies to ensure that we give you the best experience on our website.

      Learn more

      Got it!