Abstract
This article examines dynamic energy consumption caused by data during software execution on deeply embedded microprocessors, which can be significant on some devices. In worst-case energy consumption analysis, energy models are used to find the most costly execution path. Taking each instruction’s worst-case energy produces a safe but overly pessimistic upper bound. Algorithms for safe and tight bounds would be desirable. We show that finding exact worst-case energy is NP-hard, and that tight bounds cannot be approximated with guaranteed safety. We conclude that any energy model targeting tightness must either sacrifice safety or accept overapproximation proportional to data-dependent energy.
- ARM. 2012. ARM Cortex-M Programming Guide to Memory Barrier Instructions. Technical Report. ARM.Google Scholar
- Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi, and Davide Sarta. 2001. An instruction-level power analysis model with data dependency. VLSI Design 12, 2 (2001), 245--273.Google Scholar
Cross Ref
- Armin Biere, Marijn Heule, Hans van Maaren, and Toby Walsh. 2009. Handbook of Satisfiability: Volume 185: Frontiers in Artificial Intelligence and Applications. IOS Press, Amsterdam, The Netherlands. 611--632 pages. Google Scholar
Digital Library
- Paulo Francisco Butzen and Renato Perez Ribas. 2006. Leakage Current in Sub-Micrometer CMOS Gates. Technical Report. Universidade Federal do Rio Grande do Sul. Retrieved from http://www.inf.ufrgs.br/logics/docman/book_emicro_butzen.pdf.Google Scholar
- Aaron Carroll and Gernot Heiser. 2010. An analysis of power consumption in a smartphone. In Proceedings of the 2010 USENIX Conference on USENIX Annual Technical Conference (USENIXATC’10). USENIX Association, Berkeley, CA, 21. http://portal.acm.org/citation.cfm?id=1855840.1855861 Google Scholar
Digital Library
- Francisco J. Cazorla, Tullio Vardanega, Eduardo Quiñones, and Jaume Abella. 2013. Upper-bounding program execution time with extreme value theory. In 13th International Workshop on Worst-Case Execution Time Analysis (OpenAccess Series in Informatics (OASIcs’13)), Claire Maiza (Ed.), Vol. 30. Schloss Dagstuhl--Leibniz-Zentrum fuer Informatik, Dagstuhl, Germany, 64--76.Google Scholar
- Lokesh Chandra and Sourav Roy. 2008. Estimation of energy consumed by software in processor caches. In 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT’08). IEEE, Washington, DC, 21--24.Google Scholar
Cross Ref
- Ana T. Freitas, Horcio C. Neto, and Arlindo L. Oliveira. 2000. On the Complexity of Power Estimation Problems. In International Workshop on Logic Synthesis (IWLS). IEEE, 239--244. http://www.iwls.org/iwls2000/.Google Scholar
- Kyriakos Georgiou, Steve Kerrison, Zbigniew Chamski, and Kerstin Eder. 2017. Energy transparency for deeply embedded programs. ACM Trans. Archit. Code Optim. 14, 1, Article 8 (March 2017), 26 pages. Google Scholar
Digital Library
- Ricardo Gonzalez, Benjamin M. Gordon, and Mark A. Horowitz. 1997. Supply and threshold voltage scaling for low power CMOS. IEEE J. Solid-State Circuits 32, 8 (1997), 1210--1216.Google Scholar
Cross Ref
- Neville Grech, Kyriakos Georgiou, James Pallister, Steve Kerrison, Jeremy Morse, and Kerstin Eder. 2015. Static analysis of energy consumption for LLVM IR programs. In Proceedings of the 18th International Workshop on Software and Compilers for Embedded Systems (SCOPES’15). ACM, New York, 12--21. Google Scholar
Digital Library
- Hadi Hajimiri, Kamran Rahmani, and Prabhat Mishra. 2015. Efficient peak power estimation using probabilistic cost-benefit analysis. In 2015 28th International Conference on VLSI Design (VLSID’15). IEEE, Washington, DC, 369--374.Google Scholar
Cross Ref
- Rehan Hameed, Wajahat Qadeer, Megan Wachs, Omid Azizi, Alex Solomatnikov, Benjamin C. Lee, Stephen Richardson, Christos Kozyrakis, and Mark Horowitz. 2010. Understanding sources of inefficiency in general-purpose chips. SIGARCH Comput. Archit. News 38, 3 (June 2010), 37--47. Google Scholar
Digital Library
- John L. Hennessy and David A. Patterson. 2011. Computer Architecture: A Quantitative Approach (5th ed.). Morgan Kaufmann Publishers, San Francisco, CA. Google Scholar
Digital Library
- Michael S. Hsiao, Elizabeth M. Rudnick, and Janak H. Patel. 1997. K2: An estimator for peak sustainable power of VLSI circuits. In Proceedings of 1997 International Symposium on Low Power Electronics and Design. IEEE Computer Society, Washington, DC, 178--183. Google Scholar
Digital Library
- Ramkumar Jayaseelan, Tulika Mitra, and Xianfeng Li. 2006. Estimating the worst-case energy consumption of embedded software. In 12th IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS’06). IEEE Computer Society, Washington, DC, 81--90. Google Scholar
Digital Library
- David S. Johnson. 1973. Approximation algorithms for combinatorial problems. In Proceedings of the 5th Annual ACM Symposium on Theory of Computing (STOC’73). ACM, New York, 38--49. Google Scholar
Digital Library
- David Kearney and Neil W. Bergmann. 1995. Performance evaluation of asynchronous logic pipelines with data dependent processing delays. In Proceedings of the 2nd Working Conference on Asynchronous Design Methodologies. IEEE Computer Society, Washington, DC, 4--13. Google Scholar
Digital Library
- Steve Kerrison and Kerstin Eder. 2015. Energy modeling of software for a hardware multithreaded embedded microprocessor. ACM Trans. Embedded Comput. Syst. 14, 3 (2015), 56. Google Scholar
Digital Library
- Nam Sung Kim, Todd Austin, David Blaauw, Trevor Mudge, Krisztián Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut Kandemir, and Vijaykrishnan Narayanan. 2003. Leakage current: Moore’s law meets static power. Computer 36, 12 (2003), 68--75. Google Scholar
Digital Library
- Yebin Lee and Soontae Kim. 2011. DRAM energy reduction by prefetching-based memory traffic clustering. In Proceedings of the 21st Edition of the Great Lakes Symposium on Great Lakes Symposium on VLSI (GLSVLSI’11). ACM, New York, 103--108. Google Scholar
Digital Library
- George Lima, Dário Dias, and Edna Barros. 2016. Extreme value theory for estimating task execution time bounds: A careful look. In 2016 28th Euromicro Conference on Real-Time Systems (ECRTS’16). IEEE Computer Society, Washington, DC, 200--211.Google Scholar
Cross Ref
- Umer Liqat, Kyriakos Georgiou, Steve Kerrison, Pedro Lopez-Garcia, John P. Gallagher, Manuel V. Hermenegildo, and Kerstin. Eder. 2016. Inferring Parametric Energy Consumption Functions at Different Software Levels: ISA vs. LLVM IR. Springer International Publishing, Cham, 81--100.Google Scholar
- Umer Liqat, Steve Kerrison, Alejandro Serrano, Kyriakos Georgiou, Pedro Lopez-Garcia, Neville Grech, Manuel V. Hermenegildo, and Kerstin Eder. 2014. Energy consumption analysis of programs based on XMOS ISA-level models. In Logic-Based Program Synthesis and Transformation, 23rd International Symposium (LOPSTR’13), Revised Selected Papers (Lecture Notes in Computer Science), Vol. 8901. Springer, Cham, 72--90.Google Scholar
- Francois Longin. 2016. Extreme Events in Finance: A Handbook of Extreme Value Theory and Its Applications. Wiley, Hoboken, NJ.Google Scholar
- Thomas Lundqvist and Per Stenström. 1999. Timing anomalies in dynamically scheduled microprocessors. In Proceedings of the 20th IEEE Real-Time Systems Symposium (RTSS’99). IEEE Computer Society, Washington, DC, 12--. http://dl.acm.org/citation.cfm?id=827271.829103 Google Scholar
Digital Library
- David May. 2013. The XMOS XS1 Architecture. Retrieved from http://www.xmos.com/published/xmos-xs1-architecture.Google Scholar
- Pedro Marques Morgado, Paulo F. Flores, and Luis Miguel Silveira. 2009. Generating realistic stimuli for accurate power grid analysis. ACM Trans. Des. Autom. Electron. Syst. 14, 3, Article 40 (June 2009), 26 pages. Google Scholar
Digital Library
- James Pallister, Kerstin Eder, Simon J. Hollis, and Jeremy Bennett. 2014. A high-level model of embedded flash energy consumption. In Proceedings of the 2014 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES’14). ACM Press, New York, 1--9. Google Scholar
Digital Library
- James Pallister, Steve Kerrison, Jeremy Morse, and Kerstin Eder. 2017. Data dependent energy modeling for worst case energy consumption analysis. In Proceedings of the 20th International Workshop on Software and Compilers for Embedded Systems (SCOPES’17). ACM, New York, 51--59. Google Scholar
Digital Library
- Amisha Parikh, Soontae Kim, Mahmut T. Kandemir, Narayanan Vijaykrishnan, and Mary Jane Irwin. 2004. Instruction scheduling for low power. Journal of VLSI Signal Processing Systems for Signal, Image and Video Technology 37, 1 (2004), 129--149. Google Scholar
Digital Library
- Suzanne Rivoire, Parthasarathy Ranganathan, and Christos Kozyrakis. 2008. A comparison of high-level full-system power models. In Proceedings of the 2008 Conference on Power Aware Computing and Systems (HotPower’08). USENIX Association, Berkeley, CA, 3--3. http://dl.acm.org/citation.cfm?id=1855610.1855613 Google Scholar
Digital Library
- Uwe Schöning and Jacobo Torán. 2013. The Satisfiability Problem: Algorithms and Analyses. Lehmanns Media, Berlin, DE.Google Scholar
- Yakun Sophia Shao and David Brooks. 2013. Energy characterization and instruction-level energy model of Intel’s Xeon Phi processor. In International Symposium on Low Power Electronics and Design (ISLPED’13). IEEE, Washington, DC, 389--394. Google Scholar
Digital Library
- Amit Sinha and Anantha P. Chandrakasan. 2000. Energy aware software. In Proceedings of the 13th International Conference on VLSI Design (VLSID’00). IEEE Computer Society, Washington, DC, 50--. http://dl.acm.org/citation.cfm?id=580736.835252 Google Scholar
Digital Library
- Stefan Steinke, Markus Knauer, Lars Wehmeyer, and Peter Marwedel. 2001. An accurate and fine grain instruction-level energy model supporting software optimizations. In Proceedings of International Symposium on Power And Timing Modeling, Optimization and Simulation (PATMOS). IEEE Computer Society, Washington, DC.Google Scholar
- Lothar Thiele and Reinhard Wilhelm. 2004. Design for timing predictability. Real-Time Syst. 28, 2--3 (Nov. 2004), 157--177. Google Scholar
Digital Library
- Vivek Tiwari, Sharad Malik, and Andrew Wolfe. 1994. Power analysis of embedded software: A first step towards software power minimization. IEEE Trans.Very Large Scale Integr. (VLSI) 2, 4 (Dec. 1994), 437--445. Google Scholar
Digital Library
- Vivek Tiwari, Sharad Malik, Andrew Wolfe, and Mike Tien-Chien Lee. 1996. Instruction level power analysis and optimization of software. J. VLSI Signal Process. Syst. 13, 2--3 (Aug. 1996), 223--238.Google Scholar
Cross Ref
- Vijay V. Vazirani. 2001. Approximation Algorithms. Springer-Verlag New York, New York. 306--311 pages. Google Scholar
Digital Library
- Peter Wägemann, Tobias Distler, Timo Hönig, Heiko Janker, Rüdiger Kapitza, and Wolfgang Schröder-Preikschat. 2015. Worst-case energy consumption analysis for energy-constrained embedded systems. In 2015 27th Euromicro Conference on Real-Time Systems (ECRTS’15). IEEE Computer Society, Washington, DC, 105--114. Google Scholar
Digital Library
- Reinhard Wilhelm, Jakob Engblom, Andreas Ermedahl, Niklas Holsti, Stephan Thesing, David Whalley, Guillem Bernat, Christian Ferdinand, Reinhold Heckmann, Tulika Mitra, Frank Mueller, Isabelle Puaut, Peter Puschner, Jan Staschulat, and Per Stenström. 2008. The worst-case execution-time problem—Overview of methods and survey of tools. ACM Trans. Embed. Comput. Syst. 7, 3, Article 36 (May 2008), 53 pages. Google Scholar
Digital Library
Index Terms
On the Limitations of Analyzing Worst-Case Dynamic Energy of Processing
Recommendations
Data Dependent Energy Modeling for Worst Case Energy Consumption Analysis
SCOPES '17: Proceedings of the 20th International Workshop on Software and Compilers for Embedded SystemsSafely meeting Worst Case Energy Consumption (WCEC) criteria requires accurate energy modeling of software. We investigate the impact of instruction operand values upon energy consumption in cacheless embedded processors. Existing instruction-level ...
Estimating the Worst-Case Energy Consumption of Embedded Software
RTAS '06: Proceedings of the 12th IEEE Real-Time and Embedded Technology and Applications SymposiumThe evolution of battery technology is not being able to keep up with the increasing performance demand of mobile embedded systems. Therefore, battery life has become an important design constraint. As battery-operated embedded devices are deployed in ...
Worst-Case Energy Consumption Analysis for Energy-Constrained Embedded Systems
ECRTS '15: Proceedings of the 2015 27th Euromicro Conference on Real-Time SystemsThe fact that energy is a scarce resource in many embedded real-time systems creates the need for energy-aware task schedulers, which not only guarantee timing constraints but also consider energy consumption. Unfortunately, existing approaches to ...






Comments