QoS-aware stochastic power management for many-cores

ABSTRACT

A many-core processor can execute hundreds of multi-threaded tasks in parallel on its 100s - 1000s of processing cores. When deployed in a Quality of Service (QoS)-based system, the many-core must execute a task at a target QoS. The amount of processing required by the task for the QoS varies over the task's lifetime. Accordingly, Dynamic Voltage and Frequency Scaling (DVFS) allows the many-core to deliver precise amount of processing required to meet the task QoS guarantee while conserving power. Still, a global control is necessitated to ensure that the many-core overall does not exceed its power budget.

Previously, only non-stochastic controls have been proposed for the problem of QoS-aware power budgeting in many-cores. We propose the first stochastic control for the problem, which has a computational complexity less than the non-stochastic control by a factor of O (ln n) but with equivalent performance. The proposed stochastic control can operate with 6.4x less overhead than the non-stochastic control for a 256-task workload.

References

1. Christian Bienia, Sanjeev Kumar, Jaswinder Pal Singh, and Kai Li. 2008. The PARSEC Benchmark Suite: Characterization and Architectural Implications. In Parallel Architectures and Compilation Techniques (PACT).
2. Nathan Binkert et al. 2011. The gem5 Simulator. In SIGARCH Computer Architecture News (CAN).
3. Silas Boyd-Wickizer, Haibo Chen, Rong Chen, Yandong Mao, M Frans Kaashoek, Robert Morris, Aleksey Pesterev, Lex Stein, Ming Wu, Yue-hua Dai, et al. 2008. Corey: An Operating System for Many Cores. In Operating Systems Design and Implementation (OSDI).
4. Trevor E Carlson, Wim Heirman, and Lieven Eeckhout. 2011. Sniper: Exploring the Level of Abstraction for Scalable and Accurate Parallel Multi-Core Simulation. In International Conference for High Performance Computing, Networking, Storage and Analysis (SC).
5. Zhuo Chen and Diana Marculescu. 2015. Distributed Reinforcement Learning for Power Limited Many-core System Performance Optimization. In Design, Automation & Test in Europe Conference (DATE).
6. Dror G Feitelson and Larry Rudolph. 1998. Metrics and Benchmarking for Parallel Job Scheduling. Job Scheduling Strategies (1998).
7. Daniel Hackenberg, Robert Schüne, Thomas Ilsche, Daniel Molka, Joseph Schuchart, and Robin Geyer. 2015. An Energy Efficiency Feature Survey of the Intel Haswell Processor. In International Parallel and Distributed Processing Symposium Workshop (IPDPSW).
8. Jürg Henkel, Andreas Herkersdorf, Lars Bauer, Thomas Wild, Michael Hübner, Ravi Kumar Pujari, Artjom Grudnitsky, Jan Heisswolf, Aurang Zaib, Benjamin Vogel, Vahid Lari, and Sebastian Kobbe. 2012. Invasive Manycore Architectures. In Asia and South Pacific Design Automation Conference (ASP-DAC).
9. Canturk Isci, Alper Buyuktosunoglu, Chen-Yong Cher, Pradip Bose, and Margaret Martonosi. 2006. An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget. In International Symposium on Microarchitecture (MICRO).
10. Sheng Li, Jung Ho Ahn, Richard D Strong, Jay B Brockman, Dean M Tullsen, and Norman P Jouppi. 2009. McPAT: An Integrated Power, Area, and Timing Modeling Framework for Multicore and Manycore Architectures. In International Symposium on Microarchitecture (MICRO).
11. Kai Ma and Xiaorui Wang. 2012. PGCapping: Exploiting Power Gating for Power Capping and Core Lifetime Balancing in CMPs. In Parallel Architectures and Compilation Techniques (PACT).
12. Prem S Mann. 2007. Introductory Statistics. John Wiley & Sons.
13. Santiago Pagani, Heba Khdr, Waqaas Munawar, Jian-Jia Chen, Muhammad Shafique, Minming Li, and Jürg Henkel. 2014. TSP: Thermal Safe Power: Efficient Power Budgeting for Many-Core Systems in Dark Silicon. In Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).
14. Anuj Pathania, Heba Khdr, Muhammad Shafique, Tulika Mitra, and Jürg Henkel. 2017. Scalable Probabilistic Power Budgeting for Many-Cores. In Design, Automation & Test in Europe (DATE).
15. Amir-Mohammad Rahmani, Mohammad-Hashem Haghbayan, Anil Kanduri, Awet Yemane Weldezion, Pasi Liljeberg, Juha Plosila, Axel Jantsch, and Hannu Tenhunen. 2015. Dynamic Power Management for Many-Core Platforms in the Dark Silicon Era: A Multi-Objective Control Approach. In International Symposium on Low Power Electronics and Design (ISLPED).
16. Amit Kumar Singh, Muhammad Shafique, Akash Kumar, and Jürg Henkel. 2013. Mapping on Multi/Many-Core Systems: Survey of Current and Emerging Trends. In Design Automation Conference (DAC).
17. Yuan H Wang. 1993. On the Number of Successes in Independent Trials. Statistica Sinica (1993).
18. Andreas Weichslgartner, Deepak Gangadharan, Stefan Wildermann, Michael Glaß, and Jürgen Teich. 2014. DAARM: Design-Time Application Analysis and Run-Time Mapping for Predictable Execution in Many-Core Systems. In Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

Index Terms

• Computer systems organization

  • Embedded and cyber-physical systems

    • Embedded systems