Abstract
Interaction with physical objects often imposes latency requirements to multi-core embedded systems. One consequence is the need for synchronisation algorithms that provide predictable latency, in addition to high throughput. We present a synchronisation algorithm that needs at most 7 atomic memory operations per asynchronous critical section. The performance is competitive, at least, to locks.
- G. Drescher and W. Schröder-Preikschat. 2015. Guarded Sections: Structuring Aid for Wait-Free Synchronisation. In IEEE ISORC '15. 280--283. Google Scholar
Digital Library
- J.-P. Lozi, F. David, G. Thomas, J. Lawall, and G. Muller. 2012. Remote Core Locking: Migrating Critical-Section Execution to Improve the Performance of Multithreaded Applications. In USENIX ATC '12. 65--76. Google Scholar
Digital Library
- S. Reif, T. Hönig, and W. Schröder-Preikschat. 2017. In the Heat of Conflict: On the Synchronisation of Critical Sections. In IEEE ISORC '17. 42--51.Google Scholar
- S. Reif and W. Schröder-Preikschat. 2017. Predictable Synchronisation Algorithms for Asynchronous Critical Sections. Technical Report.Google Scholar
Index Terms
A predictable synchronisation algorithm
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