skip to main content
research-article

Output-based Intermediate Representation for Translation of Test-pattern Program

Published:07 October 2019Publication History
Skip Abstract Section

Abstract

An Intermediate Representation (IR) used by compilers is normally generated statically, as a result of parsing or analyzing the source program. This paper proposes a completely different type of IR, generated as a result of running the source program, the output-based IR. There is a practical translation problem where such an IR is useful, in the domain of test-pattern programs.

Test-pattern programs run on ATE (automatic test equipment), a special embedded system to test semiconductors such as DRAMs. They generate a pattern for each clock, a bit vector input to the pins of the chip. One issue is that different ATEs require different programming since each ATE manufacturer has its own programming language. Nonetheless, we should be able to test a memory chip on different ATEs as long as they generate the same patterns with the same speed. Therefore, a memory chipmaker wants to make a pattern program portable across ATEs, to fully utilize their ATE resources.

One solution is translating between pattern programs, for which we need an IR since there are multiple source ATEs and target ATEs. Instead of a conventional, static IR, we propose using the output pattern itself as an IR. Since the pattern is independent of ATEs and easily obtainable, the output-based IR obviates designing a static IR considering all ATE programming languages and hardware differences. Moreover, we might synthesize a better target program from the IR, more optimized to the target ATE. However, the full pattern generated by a product-level pattern program is huge, so we propose using an IR of abbreviated patterns, annotated with the repetition information obtained while executing the source program. Our experimental results with product-level pattern programs show that our approach is feasible.

References

  1. R. Dean Adams. 2003. High Performance Memory Testing: Design Principles, Fault Modeling and Self-Test (Frontiers in Electronic Testing). DOI:https://doi.org/10.1007/b101876Google ScholarGoogle Scholar
  2. JEDEC Solid State Technology Association. 2012. JEDEC standard: DDR4 SDRAM: JESD79-4A. September 2012 (2012).Google ScholarGoogle Scholar
  3. Michael Bächle and Jochen Ritscher. 2006. Ruby on rails. Softwaretechnik-Trends 26, 4 (2006), 44--47.Google ScholarGoogle Scholar
  4. Sébastien Bardin, Philippe Herrmann, Jérôme Leroux, Olivier Ly, Renaud Tabary, and Aymeric Vincent. 2011. The BINCOA framework for binary code analysis. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). DOI:https://doi.org/10.1007/978-3-642-22110-1_13Google ScholarGoogle Scholar
  5. D. Bruening, T. Garnett, and S. Amarasinghe. 2003. An infrastructure for adaptive dynamic optimization. In International Symposium on Code Generation and Optimization, CGO 2003. DOI:https://doi.org/10.1109/CGO.2003.1191551 arxiv:arXiv:1503.03578v1Google ScholarGoogle ScholarCross RefCross Ref
  6. David Brumley, Ivan Jager, Thanassis Avgerinos, and Edward J. Schwartz. 2011. BAP: A binary analysis platform. In Lecture Notes in Computer Science (Including Subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). DOI:https://doi.org/10.1007/978-3-642-22110-1_37 arxiv:1301.4779Google ScholarGoogle ScholarDigital LibraryDigital Library
  7. Wei-Yu Chen, Guei-Yuan Lueh, Pratik Ashar, Kaiyu Chen, and Buqi Cheng. 2018. Register allocation for Intel processor graphics. In Proceedings of the 2018 International Symposium on Code Generation and Optimization - CGO 2018. ACM Press, New York, New York, USA, 352--364. DOI:https://doi.org/10.1145/3168806Google ScholarGoogle ScholarDigital LibraryDigital Library
  8. Philippe Clauss, Bénédicte Kenmei, and Jean Christophe Beyler. 2005. The periodic-linear model of program behavior capture. 325--335. DOI:https://doi.org/10.1007/11549468_38Google ScholarGoogle Scholar
  9. John J. Comfort, Paul A. Hayter, Dinesh Kargathra, Brian R. Mason, Graham N. Turner, Ian R. Fisher, and John W. Bailey. 1987. Automatic Test Equipment.Google ScholarGoogle Scholar
  10. IEEE Computer Society. 2006. IEEE Standard Test Interface Language (STIL) for Digital Test Vector Data- Core Test Language. Vol. 1999. DOI:https://doi.org/10.1109/IEEESTD.1999.90563Google ScholarGoogle Scholar
  11. J. Kärkkäinen and P. Sanders. 2003. Simple linear work suffix array construction. Colloquium on Automata, Languages and Programming (2003). DOI:https://doi.org/10.1145/1217856.1217858Google ScholarGoogle Scholar
  12. Alain Ketterlin and Philippe Clauss. 2008. Prediction and trace compression of data access addresses through nested loop recognition. In Proceedings of the Sixth Annual IEEE/ACM International Symposium on Code Generation and Optimization - CGO’08. ACM Press, New York, New York, USA, 94. DOI:https://doi.org/10.1145/1356058.1356071Google ScholarGoogle ScholarDigital LibraryDigital Library
  13. Alain Ketterlin and Philippe Clauss. 2012. Profiling data-dependence to assist parallelization: Framework, scope, and optimization. In Proceedings - 2012 IEEE/ACM 45th International Symposium on Microarchitecture, MICRO 2012. DOI:https://doi.org/10.1109/MICRO.2012.47Google ScholarGoogle ScholarDigital LibraryDigital Library
  14. Johannes Kinder, Florian Zuleger, and Helmut Veith. 2009. An abstract interpretation-based framework for control flow reconstruction from binaries. In Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics). DOI:https://doi.org/10.1007/978-3-540-93900-9_19Google ScholarGoogle Scholar
  15. Kobayashi. 1984. Dynamic characteristics of loops. IEEE Trans. Comput. C-33, 2 (feb 1984), 125--132. DOI:https://doi.org/10.1109/TC.1984.1676404Google ScholarGoogle Scholar
  16. Glenn E. Krasner and Stephen T. Pope. 1988. A description of the model-view-controller user interface paradigm in the smalltalk-80 system. Journal of Object Oriented Programming 1, 3 (1988), 26--49. DOI:https://doi.org/10.1.1.47.366Google ScholarGoogle ScholarDigital LibraryDigital Library
  17. Chris Lattner and Vikram Adve. 2004. LLVM: A compilation framework for lifelong program analysis 8 transformation. In International Symposium on Code Generation and Optimization, CGO. DOI:https://doi.org/10.1109/CGO.2004.1281665Google ScholarGoogle ScholarCross RefCross Ref
  18. JongHyup Lee, Thanassis Avgerinos, and David Brumley. 2011. TIE: Principled reverse engineering of types in binary programs. In Network and Distributed System Security.Google ScholarGoogle Scholar
  19. Chi-Keung Luk, Robert Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janapa Reddi, and Kim Hazelwood. 2005. Pin: Building customized program analysis tools with dynamic instrumentation. In Programming Language Design and Implementation. DOI:https://doi.org/10.1145/1065010.1065034 arxiv:1003.4074Google ScholarGoogle Scholar
  20. Udi Manber and Gene Myers. 1993. Suffix arrays: A new method for on-line string searches. SIAM J. Comput. (1993). DOI:https://doi.org/10.1137/0222058Google ScholarGoogle Scholar
  21. Stephen McGinty, Daniel Hadad, Chris Nappi, and Brian Caquelin. 2015. Developing a modern platform for test engineering - Introducing the Origen semiconductor developer’s kit. Proceedings - International Test Conference 2015-Novem (2015), 1--10. DOI:https://doi.org/10.1109/TEST.2015.7342393Google ScholarGoogle ScholarCross RefCross Ref
  22. Nicholas Nethercote and Julian Seward. 2007. Valgrind - a framework for heavyweight dynamic binary instrumentation. Proceedings of the 2007 ACM SIGPLAN Conference on Programming Language Design and Implementation - PLDI’07 (2007). DOI:https://doi.org/10.1145/1250734.1250746Google ScholarGoogle Scholar
  23. C. G. Nevill-Manning and I. H. Witten. 1997. Identifying hierarchical structure in sequences: A linear-time algorithm. 7 (1997), 67--82. arxiv:cs/9709102 http://arxiv.org/abs/cs/9709102.Google ScholarGoogle Scholar
  24. Ge Nong, Sen Zhang, and Wai Hong Chan. 2009. Linear suffix array construction by almost pure induced-sorting. In Proceedings - 2009 Data Compression Conference, DCC 2009. DOI:https://doi.org/10.1109/DCC.2009.42Google ScholarGoogle ScholarDigital LibraryDigital Library
  25. P. D. T. O’connor. 1992. Testing semiconductor memories: Theory and practice, A. J. van de Goor, Wiley, 1991. Number of pages: 512. Price: £34.95. Quality and Reliability Engineering 8, 2 (1992), 156--157. DOI:https://doi.org/10.1002/qre.4680080216Google ScholarGoogle Scholar
  26. Bruce R. Parnas. 2000. Doing it in STIL: Intelligent conversion from STIL to an ATE format. Proceedings - International Test Conference (2000). DOI:https://doi.org/10.1109/TEST.2000.894192Google ScholarGoogle ScholarCross RefCross Ref
  27. Fernando Magno Quintão Pereira and Jens Palsberg. 2008. Register allocation by puzzle solving. ACM SIGPLAN Notices 43, 6 (may 2008), 216. DOI:https://doi.org/10.1145/1379022.1375609Google ScholarGoogle ScholarDigital LibraryDigital Library
  28. Bernhard Scholz and Erik Eckstein. 2002. Register allocation for irregular architectures. ACM SIGPLAN Notices 37, 7 (jul 2002), 139. DOI:https://doi.org/10.1145/566225.513854Google ScholarGoogle ScholarDigital LibraryDigital Library
  29. Madalene Spezialetti and Rajiv Gupta. 1995. Loop monotonic statements. IEEE Transactions on Software Engineering (1995). DOI:https://doi.org/10.1109/32.391376Google ScholarGoogle ScholarDigital LibraryDigital Library
  30. T. Taylor and G. A. Maston. 1996. Standard test interface language (STIL) a new language for patterns and waveforms. In Proceedings International Test Conference 1996. Test and Design Validity. DOI:https://doi.org/10.1109/TEST.1996.557091Google ScholarGoogle Scholar
  31. Peter Weiner. 1973. Linear pattern matching algorithms. In 14th Annual Symposium on Switching and Automata Theory (swat 1973). DOI:https://doi.org/10.1109/SWAT.1973.13Google ScholarGoogle ScholarDigital LibraryDigital Library
  32. Kazuo Yamaguchi. 1989. Test Pattern Generator. DOI:https://doi.org/10.1016/0375-6505(85)90011-2Google ScholarGoogle Scholar

Index Terms

  1. Output-based Intermediate Representation for Translation of Test-pattern Program

          Recommendations

          Comments

          Login options

          Check if you have access through your login credentials or your institution to get full access on this article.

          Sign in

          Full Access

          PDF Format

          View or Download as a PDF file.

          PDF

          eReader

          View online with eReader.

          eReader

          HTML Format

          View this article in HTML Format .

          View HTML Format
          About Cookies On This Site

          We use cookies to ensure that we give you the best experience on our website.

          Learn more

          Got it!