Abstract
Emerging non-volatile memory (NVM) technologies promise the durability of disks with the performance of volatile memory (RAM). To describe the persistency guarantees of NVM, several memory persistency models have been proposed in the literature. However, the formal persistency semantics of mainstream hardware is unexplored to date. To close this gap, we present a formal declarative framework for describing concurrency models in the NVM context, and then develop the PARMv8 persistency model as an instance of our framework, formalising the persistency semantics of the ARMv8 architecture for the first time. To facilitate correct persistent programming, we study transactions as a simple abstraction for concurrency and persistency control. We thus develop the PSER (persistent serialisability) persistency model, formalising transactional semantics in the NVM context for the first time, and demonstrate that PSER correctly compiles to PARMv8. This then enables programmers to write correct, concurrent and persistent programs, without having to understand the low-level architecture-specific persistency semantics of the underlying hardware.
Supplemental Material
- Jade Alglave, Mark Batty, Alastair F. Donaldson, Ganesh Gopalakrishnan, Jeroen Ketema, Daniel Poetzl, Tyler Sorensen, and John Wickerson. 2015. GP U concurrency: Weak behaviours and programming assumptions. In 20th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2015). ACM, New York, NY, USA, 577–591. Google Scholar
Digital Library
- Jade Alglave, Daniel Kroening, Vincent Nimal, and Daniel Poetzl. 2017. Don’t sit on the fence: A static analysis approach to automatic fence insertion. ACM Trans. Program. Lang. Syst. 39, 2, Article 6 (May 2017), 38 pages. Google Scholar
Digital Library
- Jade Alglave, Luc Maranget, Susmit Sarkar, and Peter Sewell. 2011. Litmus: Running tests against hardware. In Tools and Algorithms for the Construction and Analysis of Systems (TACAS 2011), Vol. 6605. Springer, 41–44. Google Scholar
Cross Ref
- ARM. 2018. ARM architecture reference manual ARMv8, for ARMv8-A architecture profile (DDI 0487D.a). https: //static.docs.arm.com/ddi0487/da/DDI0487D_a_armv8_arm.pdfGoogle Scholar
- Hillel Avni, Eliezer Levy, and Avi Mendelson. 2015. Hardware transactions in nonvolatile memory. In 29th International Symposium on Distributed Computing (DISC 2015). Springer, 617–630. Google Scholar
Digital Library
- Mark Batty, Scott Owens, Susmit Sarkar, Peter Sewell, and Tjark Weber. 2011. Mathematizing C++ concurrency. In 38th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL 2011). ACM, New York, NY, USA, 55–66. Google Scholar
Digital Library
- Hans-J. Boehm and Dhruva R. Chakrabarti. 2016. Persistence programming models for non-volatile memory. In 2016 ACM SIGPLAN International Symposium on Memory Management (ISMM 2016). ACM, New York, NY, USA, 55–67. Google Scholar
Digital Library
- James Bornholt, Antoine Kaufmann, Jialin Li, Arvind Krishnamurthy, Emina Torlak, and Xi Wang. 2016. Specifying and checking file system crash-consistency models. In 21st International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2016). ACM, 83–98. Google Scholar
Digital Library
- Dhruva R. Chakrabarti, Hans-J. Boehm, and Kumud Bhandari. 2014. Atlas: Leveraging locks for non-volatile memory consistency. SIGPLAN Not. 49, 10 (Oct. 2014), 433–452. Google Scholar
Digital Library
- Andreas Chatzistergiou, Marcelo Cintra, and Stratis D. Viglas. 2015. REWIND: Recovery write-ahead system for in-memory non-volatile data-structures. Proc. VLDB Endow. 8, 5 (Jan. 2015), 497–508. Google Scholar
Digital Library
- Nathan Chong, Tyler Sorensen, and John Wickerson. 2018. The semantics of transactions and weak memory in x86, Power, ARM, and C++. In 39th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2018). ACM, New York, NY, USA, 211–225. Google Scholar
Digital Library
- Joel Coburn, Adrian M. Caulfield, Ameen Akel, Laura M. Grupp, Rajesh K. Gupta, Ranjit Jhala, and Steven Swanson. 2011. NV-Heaps: Making persistent objects fast and safe with next-generation, non-volatile memories. SIGPLAN Not. 46, 3 (March 2011), 105–118. Google Scholar
Digital Library
- Jeremy Condit, Edmund B. Nightingale, Christopher Frost, Engin Ipek, Benjamin Lee, Doug Burger, and Derrick Coetzee. 2009. Better I/O through byte-addressable, persistent memory. In ACM SIGOPS 22nd Symposium on Operating Systems Principles (SOSP 2009). ACM, New York, NY, USA, 133–146. Google Scholar
Digital Library
- Harold Cooper. 2008. Persistent collections. https://pcollections.org/Google Scholar
- Niall Douglas. 2018. P1026R0: A call for a data persistence (iostream v2) study group. http://www.open- std.org/jtc1/sc22/ wg21/docs/papers/2018/p1026r0.pdfGoogle Scholar
- Kourosh Gharachorloo, Daniel Lenoski, James Laudon, Phillip Gibbons, Anoop Gupta, and John Hennessy. 1990. Memory consistency and event ordering in scalable shared-memory multiprocessors. SIGARCH Comput. Archit. News 18, 2SI (May 1990), 15–26. Google Scholar
Digital Library
- Vaibhav Gogte, Stephan Diestelhorst, William Wang, Satish Narayanasamy, Peter M. Chen, and Thomas F. Wenisch. 2018. Persistency for Synchronization-free Regions. In 39th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2018). ACM, New York, NY, USA, 46–61. Google Scholar
Digital Library
- Maurice P. Herlihy and Jeannette M. Wing. 1990. Linearizability: A correctness condition for concurrent objects. ACM Trans. Program. Lang. Syst. 12, 3 (July 1990), 463–492. Google Scholar
Digital Library
- Intel. 2014. Intel architecture instruction set extensions programming reference. https://software.intel.com/sites/default/ files/managed/07/b7/319433- 023.pdfGoogle Scholar
- Intel. 2015. Persistent memory programming. http://pmem.io/Google Scholar
- Intel. 2019. Intel 64 and IA-32 architectures software developer’s manual (Combined volumes). https://software.intel.com/ sites/default/files/managed/39/c5/325462- sdm- vol- 1- 2abcd- 3abcd.pdfGoogle Scholar
- ITRS. 2011. Process integration, devices, and structures. http://www.maltiel- consulting.com/ITRS_2011- Process- IntegrationDevices- Structures.pdf International technology roadmap for semiconductors.Google Scholar
- Joseph Izraelevitz, Terence Kelly, and Aasheesh Kolli. 2016a. Failure-atomic persistent memory updates via JUSTDO logging. In 21st International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2016). ACM, New York, NY, USA, 427–442. Google Scholar
Digital Library
- Joseph Izraelevitz, Hammurabi Mendes, and Michael L. Scott. 2016b. Linearizability of persistent memory objects under a full-system-crash failure model. In 30th International Symposium on Distributed Computing (DISC 2016). Springer, 313–327. Google Scholar
Cross Ref
- Daniel Jackson. 2012. Software abstractions – Logic, language, and analysis (revised ed.). MIT Press.Google Scholar
Digital Library
- Abhishek Kumar Jain, G. Scott Lloyd, and Maya Gokhale. 2018. Microscope on memory: MPSoC-enabled computer memory system assessments. In 26th IEEE Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM 2018). IEEE, 173–180. Google Scholar
Cross Ref
- Arpit Joshi, Vijay Nagarajan, Marcelo Cintra, and Stratis Viglas. 2015. Efficient persist barriers for multicores. In 48th International Symposium on Microarchitecture (MICRO-48). ACM, New York, NY, USA, 660–671. Google Scholar
Digital Library
- T. Kawahara, K. Ito, R. Takemura, and H. Ohno. 2012. Spin-transfer torque RAM technology: Review and prospect. Microelectronics Reliability 52, 4 (2012), 613 – 627. Google Scholar
Cross Ref
- Aasheesh Kolli, Vaibhav Gogte, Ali Saidi, Stephan Diestelhorst, Peter M. Chen, Satish Narayanasamy, and Thomas F. Wenisch. 2017. Language-level persistency. In 44th Annual International Symposium on Computer Architecture (ISCA 2017). ACM, New York, NY, USA, 481–493. Google Scholar
Digital Library
- Aasheesh Kolli, Steven Pelley, Ali Saidi, Peter M. Chen, and Thomas F. Wenisch. 2016a. High-performance transactions for persistent memories. SIGPLAN Not. 51, 4 (March 2016), 399–411. Google Scholar
Digital Library
- Aasheesh Kolli, Jeff Rosen, Stephan Diestelhorst, Ali Saidi, Steven Pelley, Sihang Liu, Peter M. Chen, and Thomas F. Wenisch. 2016b. Delegated persist ordering. In 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-49). IEEE Press, Piscataway, NJ, USA, Article 58, 13 pages. Google Scholar
Cross Ref
- Ori Lahav, Viktor Vafeiadis, Jeehoon Kang, Chung-Kil Hur, and Derek Dreyer. 2017. Repairing sequential consistency in C/C++11. In 38th ACM SIGPLAN Conference on Programming Language Design and Implementation (PLDI 2017). ACM, New York, NY, USA, 618–632. Google Scholar
Digital Library
- Leslie Lamport. 1979. How to make a multiprocessor computer that correctly executes multiprocess programs. IEEE Trans. Computers 28, 9 (Sept. 1979), 690–691. Google Scholar
Digital Library
- Benjamin C. Lee, Engin Ipek, Onur Mutlu, and Doug Burger. 2009. Architecting phase change memory as a scalable dram alternative. In 36th Annual International Symposium on Computer Architecture (ISCA 2009). ACM, New York, NY, USA, 2–13. Google Scholar
Digital Library
- Sihang Liu, Yizhou Wei, Jishen Zhao, Aasheesh Kolli, and Samira Manabi Khan. 2019. PMTest: A fast and flexible testing framework for persistent memory programs. In 24th International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2019). ACM, 411–425. Google Scholar
Digital Library
- Daniel Lustig, Andrew Wright, Alexandros Papakonstantinou, and Olivier Giroux. 2017. Automated synthesis of comprehensive memory model litmus test suites. In 22nd International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS 2017). ACM, 661–675. Google Scholar
Digital Library
- Faisal Nawab, Joseph Izraelevitz, Terence Kelly, Charles B. Morrey, Dhruva R. Chakrabarti, and Michael L. Scott. 2017. Dalí: A periodically persistent hash map. In 31st International Symposium on Distributed Computing (DISC 2017) (LIPIcs), Vol. 91. Schloss Dagstuhl - Leibniz-Zentrum fuer Informatik, 37:1–37:16. Google Scholar
Cross Ref
- Christos H. Papadimitriou. 1979. The serializability of concurrent database updates. J. ACM 26, 4 (Oct. 1979), 631–653. Google Scholar
Digital Library
- PCJ. 2016. Persistent collections for Java. https://github.com/pmem/pcjGoogle Scholar
- Steven Pelley, Peter M. Chen, and Thomas F. Wenisch. 2014. Memory persistency. In 41st Annual International Symposium on Computer Architecuture (ISCA 2014). IEEE Press, Piscataway, NJ, USA, 265–276. http://dl.acm.org/citation.cfm?id= 2665671.2665712Google Scholar
- Anton Podkopaev, Ori Lahav, and Viktor Vafeiadis. 2019. Bridging the gap between programming languages and hardware weak memory models. Proc. ACM Program. Lang. 3, POPL, Article 69 (Jan. 2019), 31 pages. Google Scholar
Digital Library
- Christopher Pulte, Shaked Flur, Will Deacon, Jon French, Susmit Sarkar, and Peter Sewell. 2018. Simplifying ARM concurrency: Multicopy-atomic axiomatic and operational models for ARMv8. Proc. ACM Program. Lang. 2, POPL, Article 19 (Dec. 2018), 29 pages. Google Scholar
Digital Library
- Azalea Raad, Ori Lahav, and Viktor Vafeiadis. 2018. On parallel snapshot isolation and release/acquire consistency. In Programming Languages and Systems (ESOP 2018). Springer, 940–967. Google Scholar
Cross Ref
- Azalea Raad, Ori Lahav, and Viktor Vafeiadis. 2019. On the semantics of snapshot isolation. In Verification, Model Checking, and Abstract Interpretation (VMCAI 2019). Springer, 1–23. Google Scholar
Cross Ref
- Azalea Raad and Viktor Vafeiadis. 2018. Persistence semantics for weak memory: Integrating epoch persistency with the TSO memory model. Proc. ACM Program. Lang. 2, OOPSLA, Article 137 (Oct. 2018), 27 pages. Google Scholar
Digital Library
- Peter Sewell, Susmit Sarkar, Scott Owens, Francesco Zappa Nardelli, and Magnus O. Myreen. 2010. X86-TSO: A rigorous and usable programmer’s model for x86 multiprocessors. Commun. ACM 53, 7 (July 2010), 89–97. Google Scholar
Digital Library
- Hongping Shu, Hongyu Chen, Hao Liu, Youyou Lu, Qingda Hu, and Jiwu Shu. 2018. Empirical study of transactional management for persistent memory. In 7th Non-Volatile Memory Systems and Applications Symposium (NVMSA 2018). IEEE, 61–66. Google Scholar
Cross Ref
- D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams. 2008. The missing memristor found. Nature 453 (2008), 80 – 83.Google Scholar
Cross Ref
- Arash Tavakkol, Aasheesh Kolli, Stanko Novakovic, Kaveh Razavi, Juan Gómez-Luna, Hasan Hassan, Claude Barthels, Yaohua Wang, Mohammad Sadrosadati, Saugata Ghose, Ankit Singla, Pratap Subrahmanyam, and Onur Mutlu. 2018. Enabling efficient RDMA-based synchronous mirroring of persistent memory transactions. CoRR abs/1810.09360 (2018). arXiv: 1810.09360Google Scholar
- Haris Volos, Andres Jaan Tack, and Michael M. Swift. 2011. Mnemosyne: Lightweight persistent memory. SIGPLAN Not. 47, 4 (March 2011), 91–104. Google Scholar
Cross Ref
- John Wickerson, Mark Batty, Tyler Sorensen, and George A. Constantinides. 2017. Automatically comparing memory consistency models. In 44th Annual ACM SIGPLAN-SIGACT Symposium on Principles of Programming Languages (POPL 2017). 190–204. Google Scholar
Digital Library
- Xiaojian Wu and A. L. Narasimha Reddy. 2011. SCMFS: A file system for storage class memory. In 2011 International Conference for High Performance Computing, Networking, Storage and Analysis (SC 2011). ACM, New York, NY, USA, Article 39, 11 pages. Google Scholar
Digital Library
- Jishen Zhao, Sheng Li, Doe Hyun Yoon, Yuan Xie, and Norman P. Jouppi. 2013. Kiln: Closing the performance gap between systems with and without persistence support. In 46th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-46). ACM, New York, NY, USA, 421–432. Google Scholar
Digital Library
Index Terms
Weak persistency semantics from the ground up: formalising the persistency semantics of ARMv8 and transactional models
Recommendations
Persistency semantics of the Intel-x86 architecture
Emerging non-volatile memory (NVM) technologies promise the durability of disks with the performance of RAM. To describe the persistency guarantees of NVM, several memory persistency models have been proposed in the literature. However, the persistency ...
Persistence semantics for weak memory: integrating epoch persistency with the TSO memory model
Emerging non-volatile memory (NVM) technologies promise the durability of disks with the performance of volatile memory (RAM). To describe the persistency guarantees of NVM, several memory persistency models have been proposed in the literature. However,...
Extending Intel-x86 consistency and persistency: formalising the semantics of Intel-x86 memory types and non-temporal stores
Existing semantic formalisations of the Intel-x86 architecture cover only a small fragment of its available features that are relevant for the consistency semantics of multi-threaded programs as well as the persistency semantics of programs interfacing ...






Comments